Guide

System Memory Design Guidelines (DDR-SDRAM)
R
Intel
®
852GM Chipset Platform Design Guide 107
Resistor packs are acceptable for the series and parallel command termination resistors but command
signals can not be placed within the same R-packs as data, strobe, or control signals. Figure 53 and
Table 41 below depict the recommended topology and layout routing guidelines for the DDR-SDRAM
command signals routing to SO-DIMM0 and SO-DIMM1.
Figure 53. Command Routing for Topology 1
w
Rs
SO-DIMM1 PAD SO-DIMM0 PAD
Vtt
GMCH
P1
L3
w
L2
Rt
L4
GMCH
Pin
L1
The command signals should be routed using a 2 to 1 trace spacing to trace width ratio for signals within
the DDR group, except clocks and strobes. There should be a minimum of 20 mils spacing to non-DDR
related signals. Command signals should be routed on inner layers with minimized external traces.