Datasheet

8 Datasheet, Volume 2
2.18.16 PLMLIMIT_REG—Protected Low-Memory Limit Register ...........................241
2.18.17 PHMBASE_REG—Protected High-Memory Base Register ..........................242
2.18.18 PHMLIMIT_REG—Protected High-Memory Limit Register..........................243
2.18.19 IQH_REG—Invalidation Queue Head Register.........................................244
2.18.20 IQT_REG—Invalidation Queue Tail Register ...........................................244
2.18.21 IQA_REG—Invalidation Queue Address Register.....................................245
2.18.22 ICS_REG—Invalidation Completion Status Register ................................245
2.18.23 IECTL_REG—Invalidation Event Control Register....................................246
2.18.24 IEDATA_REG—Invalidation Event Data Register.....................................247
2.18.25 IEUADDR_REG—Invalidation Event Upper Address Register.....................247
2.18.26 IRTA_REG—Interrupt Remapping Table Address Register ........................248
2.18.27 IVA_REG—Invalidate Address Register..................................................249
2.18.28 IOTLB_REG—IOTLB Invalidate Register.................................................250
2.18.29 FRCDL_REG—Fault Recording Low Register ...........................................252
2.18.30 FRCDH_REG—Fault Recording High Register..........................................253
2.18.31 VTPOLICY—DMA Remap Engine Policy Control Register...........................254
2.19 PCU MCHBAR Registers.....................................................................................255
2.19.1 MEM_TRML_ESTIMATION_CONFIG—Memory Thermal
Estimation Configuration Register ........................................................256
2.19.2 MEM_TRML_THRESHOLDS_CONFIG—Memory Thermal Thresholds
Configuration Register........................................................................257
2.19.3 MEM_TRML_STATUS_REPORT—Memory Thermal Status Report Register ...258
2.19.4 MEM_TRML_TEMPERATURE_REPORT—Memory Thermal
Temperature Report Register ..............................................................259
2.19.5 MEM_TRML_INTERRUPT—Memory Thermal Interrupt Register..................259
2.19.6 GT_PERF_STATUS—GT Performance Status Register ..............................260
2.19.7 RP_STATE_CAP—RP State Capability Register........................................260
2.19.8 SSKPD—Sticky Scratchpad Data Register..............................................261
2.20 PXPEPBAR Registers.........................................................................................263
2.20.1 EPVC0RCTL—EP VC 0 Resource Control Register ....................................263
2.21 Default PEG/DMI VT-d Remapping Engine Registers..............................................264
2.21.1 VER_REG—Version Register ................................................................265
2.21.2 CAP_REG—Capability Register .............................................................266
2.21.3 ECAP_REG—Extended Capability Register .............................................269
2.21.4 GCMD_REG—Global Command Register................................................270
2.21.5 GSTS_REG—Global Status Register......................................................274
2.21.6 RTADDR_REG—Root-Entry Table Address Register .................................275
2.21.7 CCMD_REG—Context Command Register..............................................276
2.21.8 FSTS_REG—Fault Status Register ........................................................278
2.21.9 FECTL_REG—Fault Event Control Register .............................................280
2.21.10 FEDATA_REG—Fault Event Data Register ..............................................281
2.21.11 FEADDR_REG—Fault Event Address Register .........................................281
2.21.12 FEUADDR_REG—Fault Event Upper Address Register..............................281
2.21.13 AFLOG_REG—Advanced Fault Log Register............................................282
2.21.14 PMEN_REG—Protected Memory Enable Register.....................................283
2.21.15 PLMBASE_REG—Protected Low-Memory Base Register............................284
2.21.16 PLMLIMIT_REG—Protected Low-Memory Limit Register ...........................285
2.21.17 PHMBASE_REG—Protected High-Memory Base Register ..........................286
2.21.18 PHMLIMIT_REG—Protected High-Memory Limit Register..........................287
2.21.19 IQH_REG—Invalidation Queue Head Register.........................................288
2.21.20 EG—Invalidation Queue Tail Register....................................................288
2.21.21 IQA_REG—Invalidation Queue Address Register.....................................289
2.21.22 ICS_REG—Invalidation Completion Status Register ................................289
2.21.23 IECTL_REG—Invalidation Event Control Register....................................290
2.21.24 IEDATA_REG—Invalidation Event Data Register.....................................291
2.21.25 IEADDR_REG—Invalidation Event Address Register ................................291
2.21.26 IEUADDR_REG—Invalidation Event Upper Address Register.....................292