Datasheet

62 Intel

82845 MCH for DDR Datasheet

Extended System BIOS Area (E0000h–EFFFFh)

This 64 KB area is divided into four, 16-KB segments that can be assigned with different attributes

via PAM control register as defined by the table above.

System BIOS Area (F0000h–FFFFFh)

This area is a single, 64-KB segment, which can be assigned with different attributes via PAM

control register as defined by the table above.

3.5.22 FDHC—Fixed DRAM Hole Control Register (Device 0)

Address Offset: 97h

Default Value: 00h

Access: R/W

Size: 8 bits

This 8-bit register controls a fixed DRAM hole: 15–16 MB.

Bit Description

7 Hole Enable (HEN). This bit enables a memory hole in DRAM space. Host cycles matching an

enabled hole are passed on to the ICH2

through the hub interface. The hub interface cycles

matching an enabled hole will be ignored by the MCH. Note that a selected hole is not re-

mapped.

0 = Disabled. No hole

1 = 15 MB–16 MB (1 MB hole)

6:0 Reserved.