Datasheet

Testability
R
Intel
®
82845 MCH for DDR Datasheet 145
Table 28. XOR Chain 5
Chain 5
Ball
Element # DDR Ball Name Note Initial Logic
Level
V25 1 G_C/BE0# Input 1
W28 2 G_DEVSEL# Input 1
W25 3 G_PAR Input 1
Y25 4 G_C/BE2# Input 1
W27 5 G_IRDY# Input 1
V23 6 G_C/BE1# Input 1
Y24 7 G_FRAME# Input 1
W24 8 G_TRDY# Input 1
AE23 9 WBF# Input 1
W23 10 G_STOP# Input 1
AA23 11 G_C/BE3# Input 1
AA28 12 G_AD18 Input 1
Y26 13 G_AD17 Input 1
Y27 14 G_AD16 Input 1
AB27 15 G_AD20 Input 1
AB26 16 G_AD22 Input 1
AA25 17 G_AD26 Input 1
AA24 18 G_AD25 Input 1
AA27 19 G_AD21 Input 1
AC27 20 AD_STB1 Input 1
Y23 21 G_AD23 Input 1
AC25 22 G_AD28 Input 1
AB25 23 G_AD19 Input 1
AB23 24 G_AD24 Input 1
AB24 25 G_AD31 Input 1
AC24 26 G_AD29 Input 1
AC22 27 G_AD30 Input 1
AB24 28 G_AD27 Input 1
AE22 29 RBF# Input 1
AF24 30 ST1 Input 1
AF22 31 PIPE# Input 1
AF27 32 SB_STB Input 1
AH25 33 G_GNT# Input 1