Datasheet

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82845 MCH for DDR Datasheet 141

Table 25. XOR Chain 2

Chain 2 Ball Element # Signal Name Note Initial Logic Level

D10 1 SDQ39 Input 1

C10 2 SDQ35 Input 1

C11 3 SDQ38 Input 1

F9 4 SCS2# Input 1

B11 5 SDQ34 Input 1

B13 6 SDQ36 Input 1

G11 7 SWE# Input 1

C12 8 SDQ33 Input 1

F11 9 SRAS# Input 1

C13 10 SDQ37 Input 1

D12 11 SDQS4 Input 1

E12 12 SMA0 Input 1

E13 13 SDQ32 Input 1

G14 14 SCK3# Input 1

G13 15 SBS1 Input 1

F15 16 SCK0# Input 1

E15 17 SDQS8 Input 1

G16 18 RSVD Input 1

E16 19 SMA2 Input 1

E18 20 SMA5 Input 1

F17 21 SMA1 Input 1

F19 22 SMA6 Input 1

G18 23 SMA3 Input 1

G20 24 SMA8 Input 1

G19 25 SMA4 Input 1

F21 26 SMA9 Input 1

G21 27 SMA7 Input 1

E22 28 SCKE1 Input 1

G24 29 SCK4# Input 1

G23 30 SCKE0 Input 1

G25 31 SCK1# Input 1

H23 32 SCKE2 Input 1

J25 33 RSVD Input 1

AG28 34 SBA2 Output N/A