Datasheet

Processor Integrated I/O (IIO) Configuration Registers
98 Datasheet, Volume 2
3.2.4.78 CORERRSTS—Correctable Error Status Register
This register identifies the status of the correctable errors that have been detected by
the PCI Express port
3.2.4.79 CORERRMSK—Correctable Error Mask Register
This register masks correctable errors from being signaled.
CORERRSTS
Bus: 0 Device: 0 Function: 0 Offset: 158h
Bus: 0 Device: 1 Function: 0–1 Offset: 158h
Bus: 0 Device: 2 Function: 0–3 Offset: 158h
Bus: 0 Device: 3 Function: 0–3 Offset: 158h
Bit Attr
Reset
Value
Description
31:14 RV 0h Reserved
13 RW1CS 0b Advisory Non-fatal Error Status
12 RW1CS 0b Replay Timer Time-out Status
11:9 RV 0h Reserved
8RW1CS0bReplay_Num Rollover Status
7RW1CS0bBad DLLP Status
6RW1CS0bBad TLP Status
5:1 RV 0h Reserved
0RW1CS0bReceiver Error Status
CORERRMSK
Bus: 0 Device: 0 Function: 0 Offset: 15Ch
Bus: 0 Device: 1 Function: 0–1 Offset: 15Ch
Bus: 0 Device: 2 Function: 0–3 Offset: 15Ch
Bus: 0 Device: 3 Function: 0–3 Offset: 15Ch
Bit Attr
Reset
Value
Description
31:14 RV 0h Reserved
13 RWS 1b Advisory Non-fatal Error Mask
12 RWS 0b Replay Timer Time-out Mask
11:9 RV 0h Reserved
8RWS0bReplay_Num Rollover Mask
7RWS0bBad DLLP Mask
6RWS0bBad TLP Mask
5:1 RV 0h Reserved
0RWS0bReceiver Error Mask