Datasheet
8 Datasheet, Volume 2
3.3.5.12 IRPP1ERRCTL—IRP Protocol Error Control Register.......................208
3.3.5.13 IRPP1FFERRST—IRP Protocol Fatal FERR Status Register ..............209
3.3.5.14 IRPP1FNERRST—IRP Protocol Fatal NERR Status Register .............209
3.3.5.15 IRPP1FFERRHD[0:3]—IRP Protocol Fatal FERR Header
Log 0 Register ........................................................................210
3.3.5.16 IRPP1NFERRST—IRP Protocol Non-Fatal FERR Status Register .......210
3.3.5.17 IRPP1NNERRST—IRP Protocol Non-Fatal NERR Status Register ......211
3.3.5.18 IRPP1NFERRHD[0:3]—IRP Protocol Non-Fatal FERR Header
Log 0 Register ........................................................................211
3.3.5.19 IRPP1ERRCNTSEL—IRP Protocol Error Counter Select Register.......211
3.3.5.20 IRPP1ERRCNT—IRP Protocol Error Counter Register .....................212
3.3.5.21 IIOERRST—IIO Core Error Status Register ..................................212
3.3.5.22 IIOERRCTL—IIO Core Error Control Register ...............................212
3.3.5.23 IIOFFERRST—IIO Core Fatal FERR Status Register.......................213
3.3.5.24 IIOFFERRHD[0:3]—IIO Core Fatal FERR Header Register ..............213
3.3.5.25 IIOFNERRST—IIO Core Fatal NERR Status Register ......................213
3.3.5.26 IIONFERRST—IIO Core Non-Fatal FERR Status Register................213
3.3.5.27 IIONFERRHD[0:3]—IIO Core Non-Fatal FERR Header Register.......214
3.3.5.28 IIONNERRST—IIO Core Non-Fatal NERR Status Register...............214
3.3.5.29 IIOERRCNTSEL—IIO Core Error Counter Selection Register ...........214
3.3.5.30 IIOERRCNT—IIO Core Error Counter Register..............................215
3.3.5.31 MIERRST—Miscellaneous Error Status Register............................215
3.3.5.32 MIERRCTL—Miscellaneous Error Control Register .........................215
3.3.5.33 MIFFERRST—Miscellaneous Fatal First Error Status Register ..........216
3.3.5.34 MIFFERRHDR_[0:3]—Miscellaneous Fatal First Error Header 0
Log Register...........................................................................216
3.3.5.35 MIFNERRST—Miscellaneous Fatal Next Error Status Register .........216
3.3.5.36 MINFERRST—Miscellaneous Non-Fatal First Error Status Register...216
3.3.5.37 MINFERRHDR_[0:3]—Miscellaneous Non-Fatal First Error
Header 0 Log Register..............................................................217
3.3.5.38 MINNERRST—Miscellaneous Non-Fatal Next Error Status Register ..217
3.3.5.39 MIERRCNTSEL—Miscellaneous Error Count Select Register............217
3.3.5.40 MIERRCNT—Miscellaneous Error Counter Register........................217
3.3.6 IOxAPIC PCI Configuration Space............................................................218
3.3.6.1 MBAR—IOxAPIC Base Address Register ......................................218
3.3.6.2 SVID—Subsystem Vendor ID Register........................................218
3.3.6.3 SDID—Subsystem Device ID Register ........................................218
3.3.6.4 INTL—Interrupt Line Register....................................................219
3.3.6.5 INTPIN—Interrupt Pin Register - Others .....................................219
3.3.6.6 ABAR—I/OxAPIC Alternate BAR Register.....................................219
3.3.6.7 PMCAP—Power Management Capabilities Register........................220
3.3.6.8 PMCSR—Power Management Control and Status Register..............220
3.3.6.9 RDINDEX—Alternate Index to read Indirect I/OxAPIC Register.......221
3.3.6.10 RDWINDOW—Alternate Window to read Indirect
I/OxAPIC Register ...................................................................221
3.3.6.11 IOAPICTETPC—IOxAPIC Table Entry Target Programmable
Control Register......................................................................222
3.3.6.12 IOADSELS0—IOxAPIC DSELS Register 0.....................................222
3.3.6.13 IOADSELS1—IOxAPIC DSELS Register 1.....................................223
3.3.6.14 IOINTSRC0—IO Interrupt Source Register 0................................223
3.3.6.15 IOINTSRC1—IO Interrupt Source Register 1................................224
3.3.6.16 IOREMINTCNT—Remote IO Interrupt Count Register....................224
3.3.6.17 IOREMGPECNT—Remote IO GPE Count Register ..........................225
3.3.6.18 IOXAPICPARERRINJCTL—IOxAPIC Parity Error Injection
Control Register......................................................................225
3.3.6.19 FAUXGV—FauxGV Register .......................................................225
3.3.7 I/OxAPIC Memory Mapped Registers .......................................................226
3.3.7.1 INDX—Index Register ..............................................................228
3.3.7.2 WNDW—Window Register.........................................................228
3.3.7.3 PAR—Pin Assertion Register......................................................228
3.3.7.4 EOI Register...........................................................................229