Datasheet
Datasheet, Volume 2 77
Processor Integrated I/O (IIO) Configuration Registers
6RW-O 0b
Hot-plug Capable
This field defines hot-plug support capabilities for the PCI Express port.
1 = indicates that this slot is not capable of supporting hot-plug operations.
0 = indicates that this slot is capable of supporting hot-plug operations
This bit is programed by BIOS based on the system design. This bit must be
programmed by BIOS to be consistent with the VPP enable bit for the port.
5RW-O 0b
Hot-plug Surprise
This field indicates that a device in this slot may be removed from the system
without prior notification. This field is initialized by BIOS.
0 = indicates that hot-plug surprise is not supported
1 = indicates that hot-plug surprise is supported
Generally this bit is not expected to be set because the only know usage case for
this is the ExpressCard FF. But that is not really expected usage in Processor
context. But this bit is present regardless to allow a usage if it arises.
This bit is used by IIO hardware to determine if a transition from DL_active to
DL_Inactive is to be treated as a surprise down error or not. If a port is associated
with a hot-pluggable slot and the hot-plug surprise bit is set, then any transition
to DL_Inactive is not considered an error. Refer to PCI Express Base Specification,
Revision 3.0 for further details.
4RW-O 0b
Power Indicator Present
This bit indicates that a Power Indicator is implemented for this slot and is
electrically controlled by the chassis.
0 = indicates that a Power Indicator that is electrically controlled by the chassis is
not present
1 = indicates that Power Indicator that is electrically controlled by the chassis is
present
BIOS programs this field with a 1 for CEM/Express Module FFs, if the slot is hot-
plug capable.
3RW-O 0b
Attention Indicator Present
This bit indicates that an Attention Indicator is implemented for this slot and is
electrically controlled by the chassis
0 = indicates that an Attention Indicator that is electrically controlled by the
chassis is not present
1 = indicates that an Attention Indicator that is electrically controlled by the
chassis is present
BIOS programs this field with a 1 for CEM/Express Module FFs, if the slot is hot-
plug capable.
2RW-O 0b
MRL Sensor Present
This bit indicates that an MRL Sensor is implemented on the chassis for this slot.
0 = indicates that an MRL Sensor is not present
1 = indicates that an MRL Sensor is present
BIOS programs this field with a 0 for Express Module FF always. If CEM slot is hot-
plug capable, BIOS programs this field with either 0 or 1 depending on system
design.
1RW-O 0b
Power Controller Present
This bit indicates that a software controllable power controller is implemented on
the chassis for this slot.
0 = indicates that a software controllable power controller is not present
1 = indicates that a software controllable power controller is present
BIOS programs this field with a 1 for CEM/Express Module FFs, if the slot is hot-
plug capable.
SLTCAP
Bus: 0 Device: 0 Function: 0 Offset: A4h (PCIe* MODE)
Bus: 0 Device: 1 Function: 0–1 Offset: A4h
Bus: 0 Device: 2 Function: 0–3 Offset: A4h
Bus: 0 Device: 3 Function: 0–3 Offset: A4h
Bit Attr
Reset
Value
Description