Datasheet

Processor Integrated I/O (IIO) Configuration Registers
68 Datasheet, Volume 2
3.2.4.45 DEVCAP—PCI Express* Device Capabilities Register
DEVCAP
Bus: 0 Device: 0 Function: 0 Offset: 94h
Bus: 0 Device: 1 Function: 0–1 Offset: 94h
Bus: 0 Device: 2 Function: 0–3 Offset: 94h
Bus: 0 Device: 3 Function: 0–3 Offset: 94h
Bit Attr
Reset
Value
Description
31:28 RV 0h Reserved
27:26 RO 0h
Captured Slot Power Limit Scale
Does not apply to root ports or integrated devices.
25:18 RO 00h
Captured Slot Power Limit Value
Does not apply to root ports or integrated devices.
17:16 RV 0h Reserved
15 RO 1b
Role Based Error Reporting
Processor is 1.1 compliant and so supports this feature.
14 RO 0b
Power Indicator Present on Device
Does not apply to root ports or integrated devices.
13 RO 0b
Attention Indicator Present
Does not apply to root ports or integrated devices.
12 RO 0b
Attention Button Present
Does not apply to root ports or integrated devices.
11:9 RO 000b
Endpoint L1 Acceptable Latency
Does not apply to RC.
8:6 RO 000b
Endpoint L0s Acceptable Latency
Does not apply to RC.
5RO0b
Extended Tag Field Supported
Not supported.
4:3 RO 0h
Phantom Functions Supported
IIO does not support phantom functions.
2:0 RO 0h
Max Payload Size Supported
Max payload is 128B on the DMI/PCIe port corresponding to Port 0.