Datasheet

Datasheet, Volume 2 59
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Processor Integrated I/O (IIO) Configuration Registers
3.2.4.25 SDID—Subsystem Identity
3.2.4.26 CAPPTR—Capability Pointer
3.2.4.27 CAPPTR—Capability Pointer
3.2.4.28 INTL—Interrupt Line Register
SDID
Bus: 0 Device: 0 Function: 0 Offset: 2Eh( DMI2 MODE)
Bus: 0 Device: 0 Function: 0 Offset: 46h( PCIe* MODE)
Bus: 0 Device: 1 Function: 0–1 Offset: 46h
Bus: 0 Device: 2 Function: 0–3 Offset: 46h
Bus: 0 Device: 3 Function: 0–3 Offset: 46h
Bit Attr
Reset
Value
Description
15:0 RW-O 00h
Subsystem Device ID
Assigned by the subsystem vendor to uniquely identify the subsystem
CAPPTR
Bus: 0 Device: 0 Function: 0 Offset: 34h
Bit Attr
Reset
Value
Description
7:0 RO 90h
Capability Pointer
This field points to the first capability structure for the device.
In DMI mode it points to the PCIe capability.
In PCIe mode it points to the SVID/SDID capability.
CAPPTR
Bus: 0 Device: 1 Function: 0–1 Offset: 34h
Bus: 0 Device: 2 Function: 0–3 Offset: 34h
Bus: 0 Device: 3 Function: 0–3 Offset: 34h
Bit Attr
Reset
Value
Description
7:0 RO 40h
Capability Pointer
This field points to the first capability structure for the device which is the SVID/
SDID capability.
INTL
Bus: 0 Device: 0 Function: 0 Offset: 3Ch
Bus: 0 Device: 1 Function: 0–1 Offset: 3Ch
Bus: 0 Device: 2 Function: 0–3 Offset: 3Ch
Bus: 0 Device: 3 Function: 0–3 Offset: 3Ch
Bit Attr
Reset
Value
Description
7:0 RW 00h
Interrupt Line
This is RW only for compatibility reasons. IIO hardware does not use it for any
reason.