Datasheet

Processor Uncore Configuration Registers
552 Datasheet, Volume 2
4.8.13 DDRIOCkRankUsedA[0:1]—DDRIOCkRankUsed Register
DDRIOCkRankUsedA[0:1]
Bus: 1 Device: 17 Function: 0 Offset: 38Ch
Bus: 1 Device: 15 Function: 6 Offset: 38Ch
Bit Attr
Reset
Value
Description
7:6 RV 0 Reserved
5:4 RW-LB 11b
DDRIOCKRankEnable1
For Ch01:
Bit 4 controls the clock enables for the CK0/CK0#
Bit 5 controls the clock enables for the CK3/CK3#
For Ch23:
Bit 4 controls the clock enables for the CK3/CK3#
Bit 5 controls the clock enables for the CK0/CK0#
3:2 RV 0 Reserved
1:0 RW-LB 11b
DDRIOCKRankEnable0
For Ch01:
Bit 0 controls the clock enables for the CK1/CK1#
Bit 1 controls the clock enables for the CK2/CK2#
For Ch23:
Bit 0 controls the clock enables for the CK2/CK2#
Bit 1 controls the clock enables for the CK1/CK1#