Datasheet

Datasheet, Volume 2 545
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Processor Uncore Configuration Registers
4.8.4 DDRIOBuffCfgA[0:1]—DDRIOBuffCfg Register
DDRIOBuffCfgA[0:1]
Bus: 1 Device: 17 Function: 0 Offset: 118h
Bus: 1 Device: 15 Function: 6 Offset: 118h
Bit Attr
Reset
Value
Description
31 RW-LB 0b
DDRIOBusAnchorEn
Enables the ODT 1 to 2 qclk ahead of a write operation.
30:25 RW-LB 00h
DDRIOVrefSel
Selects the Vref voltage value coming out of internal Vref generator
Vrefset[5:0] Vref (mv) Vrefset[5:0] Vref (mv)
000000 750.00 100000 750.00
000001 742.19 100001 757.81
000010 734.38 100010 765.63
000011 726.56 100011 773.44
000100 718.75 100100 781.25
000101 710.94 100101 789.06
000110 703.13 100110 796.88
000111 695.31 100111 804.69
001000 687.50 101000 812.50
001001 679.69 101001 820.31
001010 671.88 101010 828.13
001011 664.06 101011 835.94
001100 656.25 101100 843.75
001101 648.44 101101 851.56
001110 640.63 101110 859.38
001111 632.81 101111 867.19
010000 625.00 110000 875.00
010001 617.19 110001 882.81
010010 609.38 110010 890.63
010011 601.56 110011 898.44
010100 593.75 110100 906.25
010101 585.94 110101 914.06
010110 578.13 110110 921.88
010111 570.31 110111 929.69
011000 570.31 111000 929.69
011001 570.31 111001 929.69
011010 570.31 111010 929.69
011011 570.31 111011 929.69
011100 570.31 111100 929.69
011101 570.31 111101 929.69
011110 570.31 111110 929.69
011111 570.31 111111 929.69
24:9 RV 0b Reserved
8RW-LB 0b
DDRIOVrefSelExt
When this bit is 0, internal Vref is used by the DQ buffers. Otherwise, external
Vref is used
3RW-LB 1b
DDRIODeEmphasisEnable_b
Driver Deemphasis Enable (Active Low)
1 = Disable DeEmphasis
0 = Enable DeEmphasis
2RW-LB 1b
DDRIOOdtMode
When AFE driver disabled: (this bit sets to 0) -> Force half of ODT leg of