Datasheet

Datasheet, Volume 2 541
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Processor Uncore Configuration Registers
4.7.1.10 R2PCIE_DBG_BUS_CONTROL Register
4.7.1.11 R2PCIE_DBG_BUS_MATCH Register
4.7.1.12 R2PCIE_DBG_BUS_MASK Register
4.7.1.13 R2PCIE_ASC_CNTR Register
R2PCIE_DBG_BUS_CONTROL
Bus: 1 Device: 19 Function: 0 Offset: E4h
Bit Attr
Reset
Value
Description
7:5 RV 0h Reserved
4RWS-L0binvert_match_result
3RWS-L1bdebugbus_match_and_or
2RWS-L0bdebugbus_enable_gdxc
1:0 RWS-L 00b debugbus_enable
R2PCIE_DBG_BUS_MATCH
Bus: 1 Device: 19 Function: 0 Offset: E5h
Bit Attr
Reset
Value
Description
15:0 RWS-L 0000h debugbus_match_value
R2PCIE_DBG_BUS_MASK
Bus: 1 Device: 19 Function: 0 Offset: E8h
Bit Attr
Reset
Value
Description
15:0 RWS-L 0000h debugbus_mask_value
R2PCIE_ASC_CNTR
Bus: 1 Device: 19 Function: 0 Offset: EAh
Bit Attr
Reset
Value
Description
15:0 RWS-LV 0000h asc0_counter_value