Datasheet

Datasheet, Volume 2 517
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Processor Uncore Configuration Registers
4.5 Processor Utility Box (UBOX) Registers
The Utility Box is the piece of the processor logic that deals with the non mainstream
flows in the system. This includes transactions like the register accesses, interrupt
flows, lock flows and events. In addition, the Utility Box houses co-ordination for the
performance architecture, and also houses scratchpad and semaphore registers
4.5.1 CSR Group
This section apply to the processor performance Utility Box Semaphore and Scratchpad
registers
Table 4-24. Processor Utility BOX Registers Device 11, Function 0
DID VID 0h 80h
PCISTS PCICMD 4h
84h
CCR RID 8h
88h
BIST HDR PLAT CLSR Ch
8Ch
10h 90h
14h 94h
18h 98h
1Ch 9Ch
20h EVENTS_DEBUG A0h
24h A4h
28h A8h
SDID SVID 2Ch
ACh
30h B0h
CAPPTR 34h B4h
38h B8h
MAXLAT MINGNT INTPIN INTL 3Ch
BCh
CPUNODEID 40h
C0h
CPUEnable 44h
C4h
IntControl 48h
C8h
4Ch CCh
LockControl 50h
D0h
GIDNIDMAP 54h
D4h
58h D8h
5Ch DCh
CoreCount 60h
E0h
UBOXErrSts 64h
E4h
68h E8h
6Ch ECh
70h F0h
74h F4h
78h F8h
7Ch FCh