Datasheet

Datasheet, Volume 2 509
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Processor Uncore Configuration Registers
4.4.5 PCU3 Registers
4.4.5.1 DEVHIDE[0:7]—Function 0 Device Hide Register
This register is used by BIOS to hide functions in devices.
4.4.5.2 CAP_HDR Register
This register is a Capability Header.It enumerates the CAPID registers available, and
points to the next CAP_PTR.
DEVHIDE[0:7]
Bus: 1 Device: 10 Function: 3 Offset: 40h, 44h, 48h, 4Ch, 50h, 54h, 58h,
5Ch
Bit Attr
Reset
Value
Description
31:0 RW-LB
000000
00h
Disable Function
A bit set in this register implies that the appropriate device function is not
enabled. For instance, if bit 5 is set in DEVHIDE4, then it means that in device 5,
function 4 is disabled.
CAP_HDR
Bus: 1 Device: 10 Function: 3 Offset: 80h
Bit Attr
Reset
Value
Description
31:28 RV 0h Reserved
27:24 RO-FW 1h
CAPID_Version
This field has the value 0001b to identify the first revision of the CAPID register
definition.
23:16 RO-FW 18h
CAPID_Length
This field indicates the structure length including the header in bytes.
15:8 RO-FW 00h
Next_Cap_Ptr
This field is hardwired to 00h indicating the end of the capabilities linked list.
7:0 RO-FW 09h
CAP_ID
This field has the value 1001b to identify the CAP_ID assigned by the PCI SIG for
vendor dependent capability pointers.