Datasheet

Datasheet, Volume 2 507
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Processor Uncore Configuration Registers
4.4.4.16 MCA_ERR_SRC_LOG—MCA Error Source Log Register
MCSourceLog is used by the PCU to log the error sources. This register is initialized to
zeroes during reset. The PCU will set the relevant bits when the condition they
represent appears. The PCU never clears the registers-the UBox or off-die entities
should clear them when they are consumed, unless their processing involves taking
down the platform.
4.4.4.17 SAPMTIMERS3—System Agent Power Management Timers3 
Register
SAPM timers in 10 ns (100 MHz) units.
PCODE will sample this register at the end of Phase 4.
PPLL_TIMER field moved from SAPMTIMERS_1_10_1_CFG since width needed was
16 bits
Swapped PPLL_TIMER and PPLL_Short_timer so that it matches
SAPMTIMERS2_1_10_2_CFG
MCA_ERR_SRC_LOG
Bus: 1 Device: 10 Function: 2 Offset: ECh
Bit Attr
Reset
Value
Description
31 RWS-V 0b
CATERR
External error: The package asserted CATERR# (for any reason).
It is or (bit 30, bit 29); functions as a Valid bit for the other two package
conditions. It has no effect when a local core is associated with the error.
30 RWS-V 0b
IERR
External error: The package asserted IERR.
29 RWS-V 0b
MCERR
External error: The package asserted MCERR.
28:8 RV 0h Reserved
7:0 RWS-V 00h
Core Mask
Bit i is on if core i asserted an error.
SAPMTIMERS3
Bus: 1 Device: 10 Function: 2 Offset: F4h
Bit Attr
Reset
Value
Description
31:16 RW-L 0400h
PCIe PLL Short timer
Short wait from before going to PLL OFF state.
Set to 0 if want to bypass timer
The value is defined in Bclks (10ns units), 100h = 2.56 us