Datasheet

Processor Uncore Configuration Registers
500 Datasheet, Volume 2
4.4.4.5 GLOBAL_NID_MAP_REGISTER_0 Register
This reister is in the PCU CR space. It contains NID information for all the sockets in the
platform. BIOS should map the Master socket NID to the Socket0 entry. Expectation is
that BIOS will write this register during the Reset/Init flow.
GLOBAL_NID_MAP_REGISTER_0
Bus: 1 Device: 10 Function: 2 Offset: 70h
Bit Attr
Reset
Value
Description
31:28 RW 0000b
Skt_Valid
Valid bits indicating whether NID has been programmed by BIOS. If bit is 0 after
the CST/SST ready bit is set, then it implies that the socket is not populated.
27:16 RW 000h
Reserved
Reserved
15 RW 0b
Reserved
Reserved for Skt3 NID[3]
14:12 RW 000b
Skt3_NID
Socket3 NID
11 RW 0b
Reserved
Reserved for Skt2 NID[3]
10:8 RW 000b
Skt2_NID
Socket2 NID
7RW0b
Reserved
Reserved for Skt1 NID[3]
6:4 RW 000b
Skt1_NID
Socket1_NID
3RW0b
Reserved
Reserved for Skt0 NID[3]
2:0 RW 000b
Skt0_NID
Socket0 NID