Datasheet

Datasheet, Volume 2 489

Processor Uncore Configuration Registers
4.4.3.3 PCIE_ILTR_OVRD—PCI Express* Latency Tolerance 
Requirement (LTR) Override Register
This register includes parameters that PCODE will use to override information received
from PCI Express using LTR messages.
PCODE will sample this register at slow loop.
PCIE_ILTR_OVRD
Bus: 1 Device: 10 Function: 1 Offset: 78h
Bit Attr
Reset
Value
Description
31 RW 0b
Snoop Latency Valid
When this bit is set to 0b, PCODE will ignore the Snoop Latency override value.
30 RW 0b
Force Snoop Latency Override
1 = PCODE will choose the snoop latency requirement from this register,
regardless of the LTR messages that are recieved by any of the PCI Express
controllers.
0 = PCODE will choose the snoop latency requirement as the minimum value
taken between this register and each of the LTR messages that were received
by the PCI Express controllers with the Requirement bit set to 1b.
29 RV 0h Reserved
28:26 RW 000b
Snoop Latency Multiplier
This field indicates the scale that the SXL value is multiplied by to yield a time
value.
000b = Value times 1ns
001b = Value times 32ns
010b = Value times 1,024ns
011b = Value times 32,768ns
100b = Value times 1,048,576ns
101b = Value times 33,554,432ns
Other = Not Permitted
25:16 RW 000h
Snoop Latency Value
Latency requirement for Snoop requests. This value is multiplied by the
SXL_MULTIPLIER field to yield a time value, yielding an expressible range from
1ns to 34,326.183,936 ns.
Setting this field and the SXL_MULTIPLIER to all 0s indicates that the device will
be impacted by any delay and that the best possible service is requested.
15 RW 0b
Non-Snoop Latency Valid
When this bit is set to 0b, PCODE will ignore the Non-Snoop Latency override
value.
14 RW 0b
Force Non-Snoop Latency Override
1 = PCODE will choose the non-snoop latency requirement from this register,
regardless of the LTR messages that are recieved by any of the PCI Express
controllers.
0 = PCODE will choose the non-snoop latency requirement as the minimum value
taken between this register and each of the LTR messages that were received
by the PCI Express controllers with the Requirement bit set to 1b.
13 RV 0h Reserved
12:10 RW 000b
Non-Snoop Latency Multiplier
This field indicates the scale that the NSTL value is multiplied by to yield a time
value.
000b = Value times 1ns
001b = Value times 32ns
010b = Value times 1,024ns
011b = Value times 32,768ns
100b = Value times 1,048,576ns
101b = Value times 33,554,432ns
Other = Not Permitted