Datasheet

Datasheet, Volume 2 487

Processor Uncore Configuration Registers
4.4.2.21 PRIMARY_PLANE_CURRENT_CONFIG_CONTROL—Primary 
Plane Current Configuration Control Register
Limitation on the maximum current consumption of the primary power plane. PCODE
will read this value during Reset Phase 4. On each slow loop, PCODE will calculate the
maximum current possible and send the appropriate PS Code according to the
thresholds in this register.
The following algorithm is used for this Power Plane:
If Package-C3 or deeper ---> PSI3_CODE, else
If Current  PSI3_THRESHOLD ---> PSI3_CODE, else
If Current  PSI2_THRESHOLD ---> PSI2_CODE, else
If Current  PSI1_THRESHOLD ---> PSI1_CODE, else
---> Hard code to 000b (all phases).
Note: PSI codes are as VR sees them:
000 - All Phases, 001 - 2 Phases, 010 - 1 Phase, 011 - Async
Note: Thresholds are in Amps, not differential, and must be sorted.
Note: For PSI3_CODE, must assume worst-case Pkg-C3 conditions.
PRIMARY_PLANE_CURRENT_CONFIG_CONTROL
Bus: 1 Device: 10 Function: 0 Offset: F8h
Bit Attr
Reset
Value
Description
63:62 RO-V 00b Reserved
61:59 RO-V 011b PSI3 Code
58:52 RO-V 01h PSI3 Threshold
51:49 RO-V 010b PSI2 Code
48:42 RO-V 05h PSI2 Threshold
41:39 RO-V 001b PSI1 Code
38:32 RO-V 14h PSI1 Threshold
31 RO-V 0b
Lock Indication
This bit will lock the CURRENT_LIMIT settings in this register and will also lock this
setting. This means that once set to 1b, the CURRENT_LIMIT setting and this bit
become Read Only until the next Warm Reset.
30:13 RV 0h Reserved
12:0 RO-V 0438h
Current Limitation
Current limitation in 1/8 A increments. This field is locked by
PRIMARY_PLANE_CURRENT_CONFIG_CONTROL[LOCK]. When the LOCK bit is set
to 1b, this field becomes Read Only.
The default value of 438h corresponds to 135A.