Datasheet

Processor Uncore Configuration Registers
480 Datasheet, Volume 2
4.4.2.9 PLATFORM_ID—Platform ID Register
Used for selecting which patch to use.
4.4.2.10 PLATFORM_INFO—Platform Information Register
This register contains information about platform’s frequency capabilities.
PLATFORM_ID
Bus: 1 Device: 10 Function: 0 Offset: A0h
Bit Attr
Reset
Value
Description
63:53 RV 0h Reserved
52:50 RO-V 000b
Platform ID
This field contains information concerning the intended platform for the processor.
49:0 RV 0h Reserved
PLATFORM_INFO
Bus: 1 Device: 10 Function: 0 Offset: A8h
Bit Attr
Reset
Value
Description
63:48 RV 0h Reserved
47:40 RO-V 00h
Maximum Efficiency Ratio
Maximum Efficiency Ratio.
39:31 RV 0h Reserved
30 RO-V 1b
Programmable TJ Offset Enable
Programmable TJ Offset Enable.
0 = Programming Not Allowed
1 = Programming Allowed
29 RO-V 1b
Programming TDP Limits Enable
Programmable TDP Limits for Turbo Mode.
0 = Programming Not Allowed
1 = Programming Allowed
28 RO-V 1b
Programing Turbo Ratios
Programmable Turbo Ratios per number of Active Cores
0 = Programming Not Allowed
1 = Programming Allowed
27 RO-V 0b
Sample Part
Encoding Description
0 = Production Part
1 = Sample Part
26 RO-V 0b
DCU 16K Mode Support
0 = Indicates that the part does not support the 16K DCU mode.
1 = Indicates that the part supports 16K DCU mode.
25:17 RV 0h Reserved
16 RO-V 1b
SMM Save Capability
Capability of x87 instruction/data pointers save/restore in SMM always supported.
15:8 RO-V 00h
Maximum Non Turbo Limit Ratio
7:0 RV 0h Reserved