Datasheet
Processor Uncore Configuration Registers
478 Datasheet, Volume 2
4.4.2.4 MEM_ACCUMULATED_BW_CH_[0:3]—
MEM_ACCUMULATED_BW_CH_0 Register
This register contains a measurement proportional to the weighted DRAM BW for the
channel (including all ranks). The weights are configured in the memory controller
channel register PM_CMD_PWR.
4.4.2.5 PRIP_NRG_STTS—Primary Plane Energy Status Register
This register reports total energy consumed. The counter will wrap around and continue
counting when it reaches its limit.
The energy status is reported in units which are defined in
PACKAGE_POWER_SKU_UNIT_MSR[ENERGY_UNIT].
Software will read this value and subtract the difference from last value read. The value
of this register is updated every 1 mSec.
4.4.2.6 PACKAGE_POWER_SKU—Package Power SKU Register
Defines allowed SKU power and timing parameters. PCODE will update the contents of
this register.
MEM_ACCUMULATED_BW_CH_[0:3]
Bus: 1 Device: 10 Function: 0 Offset: 64h, 68h, 6Ch, 70h
Bit Attr
Reset
Value
Description
31:0 RO-V
000000
00h
Data
The weighted BW value is calculated by the memory controller based on the
following formula:
Num_Precharge * PM_CMD_PWR[PWR_RAS_PRE] +
Num_Reads * PM_CMD_PWR[PWR_CAS_R] +
Num_Writes * PM_CMD_PWR[PWR_CAS_W]
PRIP_NRG_STTS
Bus: 1 Device: 10 Function: 0 Offset: 7Ch
Bit Attr
Reset
Value
Description
31:0 RO-V
000000
00h
Total Energy Consumed
Energy Value
PACKAGE_POWER_SKU
Bus: 1 Device: 10 Function: 0 Offset: 84h
Bit Attr
Reset
Value
Description
63:55 RV 0h Reserved
54:48 RO-V 18h
Maximal Time Window
The maximal time window allowed for the SKU. Higher values will be clamped to
this value.
The timing interval window is Floating Point number given by
power(2,PKG_MAX_WIN).
The unit of measurement is defined in
PACKAGE_POWER_SKU_UNIT_MSR[TIME_UNIT].
47 RV 0h Reserved