Datasheet

Processor Uncore Configuration Registers
474 Datasheet, Volume 2
Table 4-22. PCU2 Register Map Table: Device: 10 Function: 2
DID VID 0h
PRIMARY_PLANE_RAPL_PERF_STATUS
80h
PCISTS PCICMD 4h 84h
CCR RID 8h
PACKAGE_RAPL_PERF_STATUS
88h
BIST HDR PLAT CLSR Ch 8Ch
10h
DRAM_POWER_INFO
90h
14h 94h
18h 98h
1Ch 9Ch
20h
DRAM_ENERGY_STATUS
A0h
24h A4h
28h
DRAM_ENERGY_STATUS_CH0
A8h
SDID SVID 2Ch ACh
30h
DRAM_ENERGY_STATUS_CH1
B0h
CAPPTR 34h B4h
38h
DRAM_ENERGY_STATUS_CH2
B8h
MAXLAT MINGNT INTPIN INTL 3Ch BCh
CPU_BUS_NUMBER 40h
DRAM_ENERGY_STATUS_CH3
C0h
SA_TEMPERATURE 44h C4h
48h
DRAM_PLANE_POWER_LIMIT
C8h
4Ch CCh
BANDTIMERS2 50h
D0h
54h D4h
58h
DRAM_RAPL_PERF_STATUS
D8h
5Ch DCh
60h E0h
DYNAMIC_PERF_POWER_CTL 64h PERF_P_LIMIT_CONTROL E4h
68h IO_BANDWIDTH_P_LIMIT_CONTROL E8h
GLOBAL_PKG_C_S_CONTROL_REGISTER 6Ch MCA_ERR_SRC_LOG ECh
GLOBAL_NID_MAP_REGISTER_0 70h SAPMTIMERS2 F0h
74h SAPMTIMERS3 F4h
78h THERMTRIP_CONFIG F8h
PKG_CST_ENTRY_CRITERIA_MASK 7Ch PERFMON_PCODE_FILTER FCh