Datasheet
Datasheet, Volume 2 461
Processor Uncore Configuration Registers
4.2.16.31 MCSCRAMBLECONFIG—Data Scrambler Configuration Register
This register is used to scramble and unscramble the MC to DDR Pad data using the
DDR command address and the scramble seed. All the fields CH_ENABLE, TX_ENABLE
and RX_ENABLE must be set to 1 to enable scrambling, and must be cleared to disable
scrambling. This register can only be changed in IOSAV mode before any accesses to
memory.
TX_ENABLE: "Hooked up to Receive De-scramble in the design – setting this bit causes
MC Rx data from the DDR pads to be descrambled. This bit is locked during normal
(non-IOSAV) mode".
RX_ENABLE: "Hooked up to Transmit De-scramble in the design – setting this bit
causes MC Tx data to the DDR pads to be scrambled. This bit is locked during normal
(non-IOSAV) mode".
4.2.16.32 MCSCRAMBLE_SEED_SEL Register
This register is locked by SEED_LOCK bit in MCSCRAMBLECONFIG register.
MCSCRAMBLECONFIG
Bus: 1 Device: 16 Function: 2 Offset: 1E0h
Bus: 1 Device: 16 Function: 6 Offset: 1E0h
Bus: 1 Device: 16 Function: 3 Offset: 1E0h
Bus: 1 Device: 16 Function: 7 Offset: 1E0h
Bit Attr
Reset
Value
Description
31:4 RV 0h Reserved
3RWS-O0b
SEED_LOCK: Seed Lock
Lock bit for the seed update.
1b = lock
0b = unlock
2RWS-L0h
CH_ENABLE: Channel Enable
This bit is locked during NORMAL (non-IOSAV) mode.
1RWS-L0h
TX_ENABLE
"Hooked up to Receive De-scramble in the design – setting this bit causes MC Rx
data from the DDR pads to be descrambled. This bit is locked during normal (non-
IOSAV) mode".
0RWS-L0h
RX_ENABLE
"Hooked up to Transmit De-scramble in the design – setting this bit causes MC Tx
data to the DDR pads to be scrambled. This bit is locked during normal (non-
IOSAV) mode".
MCSCRAMBLE_SEED_SEL
Bus: 1 Device: 16 Function: 2 Offset: 1E4h
Bus: 1 Device: 16 Function: 6 Offset: 1E4h
Bus: 1 Device: 16 Function: 3 Offset: 1E4h
Bus: 1 Device: 16 Function: 7 Offset: 1E4h
Bit Attr
Reset
Value
Description
31:16 RWS-L 0000h
Upper Scrambling Seed Select
Reordering the upper srambling seed select control.
15:0 RWS-L 0000h
Lower Scrambling Seed Select
Reordering the lower srambling seed select control.