Datasheet

Datasheet, Volume 2 445
Processor Uncore Configuration Registers
4.2.16.3 IOLATENCY0—IO Latency Register
4.2.16.4 IOLATENCY1—IO Latency 1 Register
IOLATENCY0
Bus: 1 Device: 16 Function: 2 Offset: 8Ch
Bus: 1 Device: 16 Function: 3 Offset: 8Ch
Bus: 1 Device: 16 Function: 6 Offset: 8Ch
Bus: 1 Device: 16 Function: 7 Offset: 8Ch
Bit Attr
Reset
Value
Description
31:28 RW 0h
IO_LAT_RANK7
Rank 7 IO latency in QCLK
27:24 RW 0h
IO_LAT_RANK6
Rank 6 IO latency in QCLK
23:20 RW 0h
IO_LAT_RANK5
Rank 5 IO latency in QCLK
19:16 RW 0h
IO_LAT_RANK4
Rank 4 IO latency in QCLK
15:12 RW 0h
IO_LAT_RANK3
Rank 3 IO latency in QCLK
11:8 RW 0h
IO_LAT_RANK2
Rank 2 IO latency in QCLK
7:4 RW 0h
IO_LAT_RANK1
Rank 1 IO latency in QCLK
3:0 RW 0h
IO_LAT_RANK0
Rank 0 IO latency in QCLK
IOLATENCY1
Bus: 1 Device: 16 Function: 2 Offset: 90h
Bus: 1 Device: 16 Function: 3 Offset: 90h
Bus: 1 Device: 16 Function: 6 Offset: 90h
Bus: 1 Device: 16 Function: 7 Offset: 90h
Bit Attr
Reset
Value
Description
31:6 RV 0h Reserved
5:0 RW 0h IO_LAT_IO_COMP