Datasheet

Datasheet, Volume 2 441

Processor Uncore Configuration Registers
4.2.15.6 IOSAV_CH_SEQ_CTRL—IOSAV Channel Sequence 
Control Register
The RW-L field is locked by either NORMAL bit in MCMTR register or by IOSAV_DISABLE
bit in LT_IOSAV_MEMINIT_DIS register.
IOSAV_CH_SEQ_CTRL
Bus: 1 Device: 16 Function: 0 Offset: 450h
Bus: 1 Device: 16 Function: 1 Offset: 450h
Bus: 1 Device: 16 Function: 4 Offset: 450h
Bus: 1 Device: 16 Function: 5 Offset: 450h
Bit Attr
Reset
Value
Description
31:25 RV 0h Reserved
24 RW-L 0b
en_inf_subseq
Enable infinite subsequence repeat.
23 RW-L 0b
ref_dur_wait
Enable refresh during the sequence wait period when set.
22 RW-L 0b
ALLOW_REF
when this bit is set, refresh is not blocked during sequence execution.
Note: This bit cannot be set with ’keep_refresh_disabled’ bit on the same
sequence or during previous sequence.
The purpose of the bit is to allow using sequence machine as timer without
affecting DDR.
21 RV 0h Reserved
20 RW-L 0b
KEEP_REF DIS
if this bit is set, the refresh remains disabled until the next sequence is
programmed and begins to execute. In this case it is users responsibility to
complete all sequences (until the last which is programmed with this bit cleared)
within the 9*T_REFI period.
19:18 RW-L 0h
LOOP_LEN
0h = One subsequence
1h = Two subsequences
2h = Three subsequences
3h = Four subsequences
17 RW-L 0h
STOP_ON_ERR
If this bit is set, the sequence shall stop on the first error that occurs in the
sequence. The point that the error is detected is delayed to the command issue;
thus, several commands are issued after the command that caused the error was
issued.
16:8 RW-LV 004h
WAIT
This field is the number of cycles to wait at the end of each sequence-iteration.
Purpose of this wait (contrary to the wait at the end of the last sub-sequence) is to
allow maintenance operations in infinite loops. If this field is zero, no maintenance
operations are allowed. If the field is non-zero, RCOMP, refresh and ZQCx may
occur. During the first 16 (TBD) cycles of this wait period, refresh is enabled. On
the next 16 (TBD) cycles, RCOMP is allowed. ZQCx, if required, shall occur at the
end of the refresh. In the cases of wait > 0 (maintenance is allowed) it is
recommended not to have each sequence-iteration longer than T_REFI (including
the wait period). The wait value must be larger than T_RFC + T_ZQCS + 32-
DCLK.
7:0 RW-LV 01h
REPEAT
This field is the number of iterations. This field is updated in run-time. Sequence
starts running as soon as this field is non-zero. The field is decremented every
time that a full sequence iteration is completed, and when zero, the sequence is
done. If field is set to FFh, infinite repeat is executed; that is, no decrement is
done, and sequence is executed until aborted by writing 0 into the repeat field.