Datasheet

Datasheet, Volume 2 431
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Processor Uncore Configuration Registers
4.2.14.19 RD_ODT_TBL2—Read ODT Lookup Table 2 Register
One entry for each physical rank on each channel. Each entry defines which ODT
signals are asserted when accessing that rank. This register also includes ODT timing
control.
The recommended BIOS settings to keep the MC_TERM_RNK_MSK consistent are:
• Set Read ODT mapping – read ODT specifies all ODT pins assertion for a read
targeting at this rank. Please clear read target DIMM's termination rank bit. The
non-target DIMM's termination rank bits must be set. All non-termination rank in
the ODT mapping table must be cleared.
RD_ODT_TBL2
Bus: 1 Device: 16 Function: 0 Offset: 268h
Bus: 1 Device: 16 Function: 1 Offset: 268h
Bus: 1 Device: 16 Function: 4 Offset: 268h
Bus: 1 Device: 16 Function: 5 Offset: 268h
Bit Attr
Reset
Value
Description
31:22 RV 0h Reserved
21:20 RW 00b
ExtraTrailingODT
Extra Trailing ODT cycles
19:18 RV 0h Reserved
17:16 RW 00b
ExtraLeadingODT
Extra Leading ODT cycles
15:14 RV 0h Reserved
13:8 RW 0h
RD_ODT_RANK9
Rank 9 Read ODT pins
7:6 RV 0h Reserved
5:0 RW 0h
RD_ODT_RANK8
Rank 8 Read ODT pins