Datasheet

Datasheet, Volume 2 41
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Processor Integrated I/O (IIO) Configuration Registers
Table 3-2. (DMI2) Extended Configuration Map – Device 0/Function 0 – 
Offset 100h–1FCh
XPREUT_HDR_EXT 100h
PERFCTRLSTS
180h
XPREUT_HDR_CAP 104h 184h
XPREUT_HDR_LEF 108h
MISCCTRLSTS
188h
10Ch 18Ch
110h PCIE_IOU_BIF_CTRL 190h
114h 194h
118h 198h
11Ch 19Ch
120h
DMICTRL
1A0h
124h 1A4h
128h DMISTS 1A8h
12Ch 1ACh
130h LNKSTS LNKCON 1B0h
134h 1B4h
138h 1B8h
13Ch 1BCh
APICLIMIT APICBASE 140h LNKSTS2 LNKCON2 1C0h
VSECHDR 144h
1C4h
VSHDR 148h
1C8h
UNCERRSTS 14Ch
1CCh
UNCERRMSK 150h ERRINJCAP 1D0h
UNCERRSEV 154h ERRINJHDR 1D4h
CORERRSTS 158h
ERRINJCON 1D8h
CORERRMSK 15Ch
1DCh
ERRCAP 160h CTOCTRL 1E0h
HDRLOG0 164h
1E4h
HDRLOG1 168h
1E8h
HDRLOG2 16Ch
1ECh
HDRLOG3 170h
1F0h
RPERRCMD 174h
1F4h
RPERRSTS 178h
1F8h
ERRSID 17Ch
1FCh