Datasheet

Datasheet, Volume 2 409

Processor Uncore Configuration Registers
4.2.13.8 DIMM_TEMP_EV_OFST_[0:2]—DIMM TEMP 
Configuration Register
DIMM_TEMP_EV_OFST_[0:2]
Bus: 1 Device: 16 Function: 0 Offset: 140h, 144h, 148h
Bus: 1 Device: 16 Function: 1 Offset: 140h, 144h, 148h
Bus: 1 Device: 16 Function: 4 Offset: 140h, 144h, 148h
Bus: 1 Device: 16 Function: 5 Offset: 140h, 144h, 148h
Bit Attr
Reset
Value
Description
31:24 RO 00h
TEMP_AVG_INTRVL
Temperature data is averaged over this period. At the end of averaging period
(ms) , averaging process starts again. 1h–FFh = Averaging data is read using
TEMPDIMM STATUSREGISTER (Byte 1/2) as well as used for generating hysteresis
based interrupts.
00 = Instantaneous Data (non-averaged) is read using TEMPDIMM
STATUSREGISTER (Byte 1/2) as well as used for generating hysteresis
based interrupts.
Note: The processor does not support temperature averaging.
23:15 RV 0h Reserved
14 RW 0b
Initiate THRTMID on TEMPLO
Initiate THRTMID on TEMPLO
13 RW 1b
Initiate 2X refresh on TEMPLO
DIMM with extended temperature range capability will need double refresh rate in
order to avoid data lost when DIMM temperature is above 85 °C, but below 95 °C.
Warning: If the 2x refresh is disable with extended temperature range DIMM
configuration, system cooling and power thermal throttling scheme must ensure
the DIMM temperature will not exceed 85 °C.
12 RW 0b
Assert MEMHOT Event on TEMPHI
Assert MEMHOT# Event on TEMPHI
11 RW 0b
Assert MEMHOT Event on TEMPMID
Assert MEMHOT# Event on TEMPMID
10 RW 0b
Assert MEMHOT Event on TEMPLO
Assert MEMHOT# Event on TEMPLO
9RW0b
Assert MEMHOT Event on TEMPOEMHI
Assert MEMHOT# Event on TEMPOEMHI
8RW0b
Assert MEMHOT Event on TEMPOEMLO
Assert MEMHOT# Event on TEMPOEMLO
7:4 RV 0h Reserved
3:0 RW 0h
DIMM_TEMP_OFFSET
Bit 3:0 = Temperature Offset field