Datasheet

Datasheet, Volume 2 353
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Processor Uncore Configuration Registers
4.2.8.6 SMBCMD_1—SMBus Command Register
A write to this register initiates a DIMM EEPROM access through the SMBus/I
2
C.
15:0 RO-V 0000h
SMB_RDATA: Read Data
Holds data read from SMBus Read commands.
Since TSOD/EEPROM are I
2
C devices and the byte order is MSByte first in a word
read, reading of I
2
C using word read should return SMB_RDATA[15:8]=I2C_MSB
and SMB_RDATA[7:0]=I2C_LSB. If reading of I
2
C using byte read, the
SMB_RDATA[15:8]=donít care; SMB_RDATA[7:0]=read_byte.
If we have a SMB slave connected on the bus, reading of the SMBus slave using
word read should return SMB_RDATA[15:8]=SMB_LSB and
SMB_RDATA[7:0]=SMB_MSB.
If the software is not sure whether the target is I
2
C or SMBus slave, use byte
access.
SMB_STAT_1
Bus: 1 Device: 15 Function: 0 Offset: 190h
Bit Attr
Reset
Value
Description
SMBCMD_1
Bus: 1 Device: 15 Function: 0 Offset: 194h
Bit Attr
Reset
Value
Description
31 RW-V 0b
SMB_CMD_TRIGGER: CMD Trigger
After setting this bit to 1, the SMBus master will issue the SMBus command using
the other fields written in SMBCMD_[0:1] and SMBCntl_[0:1].
Note: the “-V” in the attribute implies the hardware will reset this bit when the
SMBus command is being started.
30 RWS 0b
SMB_PNTR_SEL: Pointer Selection
SMBus/I
2
C present pointer based access enable when set; otherwise, use random
access protocol. Hardware based TSOD polling will also use this bit to enable the
pointer word read.
Important Note: The processor hardware based TSOD polling can be configured
with pointer based access. If software manually issue SMBus transaction to an
other address (that is, changing the pointer in the slave device), it is software’s
responsibility to restore the pointer in each TSOD before returning to hardware
based TSOD polling while keeping the SMB_PNTR_SEL=1.
29 RWS 0b
SMB_WORD_ACCESS: Word Access
SMBus/I
2
C word (2B) access when set; otherwise, it is a byte access.
28 RWS 0b
SMB_WRT_PNTR
Bit[28:27] = 00: SMBus Read
Bit[28:27] = 01: SMBus Write
Bit[28:27] = 10: illegal combination
Bit[28:27] = 11: Write to pointer register SMBus/I
2
C pointer update (byte). bit
30, and 29 are ignored.
Note: SMBCntl_[0:1][26] will NOT disable WrtPntr update command.
27 RWS 0b
SMB_WRT_CMD
0 = Read command
1 = Write command
26:24 RWS 000b
SMB_SA: Slave Address
This field identifies the DIMM SPD/TSOD to be accessed.
23:16 RWS 00h
SMB_BA: Bus Txn Address
This field identifies the bus transaction address to be accessed.
Note: in WORD access, 23:16 specify 2B access address. In Byte access, 23:16
specify 1B access address.