Datasheet

Processor Uncore Configuration Registers
346 Datasheet, Volume 2
4.2.7.6 MH_TEMP_STAT—MEMHOT Temperature Status Register
MH_TEMP_STAT
Bus: 1 Device: 15 Function: 0 Offset: 120h
Bit Attr
Reset
Value
Description
31 RW-V 0h
MH1_DIMM_VAL
Valid if set. PCODE searches the hottest DIMM temperature and writes the hottest
temperature and the corresponding Hottest DIMM CID/ID and sets the valid bit.
MEMHOT hardware logic processes the corresponding MEMHOT data when there is
a MEMHOT event. Upon processing, the valid bit is reset. PCODE can write over an
existing valid temperature since a valid temperature may not occur during a
MEMHOT event. If PCODE setting the valid bit occurs at the same cycle that the
MEMHOT logic processing and tries to clear, the PCODE set will dominate since it is
a new temperature is updated while processing logic tries to clear an existing
temperature.
30:28 RW 0h
MH1_DIMM_CID
Hottest DIMM Channel ID for MEM_HOT[1]#. PCODE searches the hottest DIMM
temperature and writes the hottest temperature and the corresponding Hottest
DIMM CID/ID.
27:24 RW 0h
MH1_DIMM_ID
Hottest DIMM ID for MEM_HOT[1]#. PCODE searches the hottest DIMM
temperature and writes the hottest temperature and the corresponding Hottest
DIMM CID/ID.
23:16 RW 00h
MH1_TEMP
Hottest DIMM Sensor Reading for MEM_HOT[1]#. This reading represents the
temperature of the hottest DIMM. PCODE searches the hottest DIMM temperature
and writes the hottest temperature and the corresponding Hottest DIMM CID/ID.
Note: iMC hardware loads this value into the MEM_HOT duty cycle generator
counter since PCode may update this field at different rate/time. This field ranges
from 0 to 127; that is, the most significant bit is always zero.
15 RW-V 0h
MH0_DIMM_VAL
Valid if set. PCODE searches the hottest DIMM temperature and writes the hottest
temperature and the corresponding Hottest DIMM CID/ID and sets the valid bit.
MEMHOT hardware logic processes the corresponding MEMHOT data when there is
a MEMHOT event. Upon processing, the valid bit is reset. PCODE can write over an
existing valid temperature since a valid temperature may not occur during a
MEMHOT event. If PCODE setting the valid bit occurs at the same cycle that the
MEMHOT logic processing and tries to clear, the PCODE set will dominate since it is
a new temperature updated while processing logic tries to clear an existing
temperature.
14:12 RW 0h
MH0_DIMM_CID
Hottest DIMM Channel ID for MEM_HOT[0]#. PCODE searches the hottest DIMM
temperature and writes the hottest temperature and the corresponding Hottest
DIMM CID/ID.
11:8 RW 0h
MH0_DIMM_ID
Hottest DIMM ID for MEM_HOT[0]#. PCODE searches the hottest DIMM
temperature and writes the hottest temperature and the corresponding Hottest
DIMM CID/ID.
7:0 RW 00h
MH0_TEMP
Hottest DIMM Sensor Reading for MEM_HOT[0]#. This reading represents the
temperature of the hottest DIMM. PCODE searches the hottest DIMM temperature
and writes the hottest temperature and the corresponding Hottest DIMM CID/ID.
Note: iMC hardware loads this value into the MEM_HOT duty cycle generator
counter since PCode may update this field at different rate/time. This field ranges
from 0 to 127; that is, the most significant bit is always zero.