Datasheet
Datasheet, Volume 2 343
Processor Uncore Configuration Registers
4.2.7.2 MH_SENSE_500NS_CFG—MEMHOT Sense and 500 ns
Config Register
4.2.7.3 MH_DTYCYC_MIN_ASRT_CNTR_[0:1]—MEMHOT Duty Cycle
Period and Min Assertion Counter Register
MH_SENSE_500NS_CFG
Bus: 1 Device: 15 Function: 0 Offset: 10Ch
Bit Attr
Reset
Value
Description
31:26 RV 0h Reserved
25:16 RW 0C8h
MH_SENSE_PERIOD
MEMHOT Input Sense Period in number of CNTR_500_NANOSEC. BIOS calculates
the number of CNTR_500_NANOSEC for 50 usec/100 usec/200 usec/400 usec.
15:13 RW 2h
MH_IN_SENSE_ASSERT
MEMHOT Input Sense Assertion Time in number of CNTR_500_NANOSEC. BIOS
calculates the number of CNFG_500_NANOSEC for 1 usec/2 usec input_sense
duration.
Here is MH_IN_SENSE_ASSERT ranges:
0 or 1 = Reserved
2–7 = 1 usec – 3.5 usec sense assertion time in 500 nsec increment
12:10 RV 0h Reserved
9:0 RWS 190h
CNFG_500_NANOSEC
500 ns equivalent in DCLK. BIOS calculates the number of DCLK to be equivalent
to 500 nanoseconds. This value is loaded into CNTR_500_NANOSEC when it is
decremented to zero. For pre-Si validation, minimum 2 can be set to speed up the
simulation.
The following are the recommended CNFG_500_NANOSEC values based from
each DCLK frequency:
DCLK=400 MHz, CNFG_500_NANOSEC = 0C8h
DCLK=533 MHz, CNFG_500_NANOSEC = 10Ah
DCLK=667 MHz, CNFG_500_NANOSEC = 14Dh
DCLK=800 MHz, CNFG_500_NANOSEC = 190h
DCLK=933 MHz, CNFG_500_NANOSEC = 1D2h
MH_DTYCYC_MIN_ASRT_CNTR_[0:1]
Bus: 1 Device: 15 Function: 0 Offset: 110h, 114h
Bit Attr
Reset
Value
Description
31:20 RO-V 0h
MH_MIN_ASRTN_CNTR
MEM_HOT[1:0]# Minimum Assertion Time Current Count in number of
CNTR_500_NANOSEC (decrement by 1 every CNTR_500_NANOSEC). When the
counter is zero, the counter is remain at zero and it is only loaded with
MH_MIN_ASRTN when MH_DUTY_CYC_PRD_CNTR is reloaded.
19:0 RW-LV 00000h
MH_DUTY_CYC_PRD_CNTR
MEM_HOT[1:0]# DUTY Cycle Period Current Count in number of
CNTR_500_NANOSEC (decrement by 1 every CNTR_500_NANOSEC). When the
counter is zero, the next cycle is loaded with MH_DUTY_CYC_PRD. PMSI pause (at
quiencense) and resume (at wipe)