Datasheet

Processor Uncore Configuration Registers
334 Datasheet, Volume 2
4.2.5.6 MMCFG_Rule—MMCFG Rule for Interleave Decoder Register
4.2.5.7 IOPORT_Target_LIST—IO Target List Register
MMCFG_Rule
Bus: N Device: 13 Function: 6 Offset: C0h
Bit Attr
Reset
Value
Description
63:46 RV 0h Reserved
45:20 RW-LB
000000
0h
Base address
This field correspond to Addr[45:20] of the MMCFG rule base address. The
granularity of MMCFG rule is 64 MB. This interleave decoder can be used for
higher segments of the MMCFG and is not restricted to Segment 0 of MMCFG.
Check MMCFG_TargetList for Interleaved target list used by this decoder.
19:3 RV 0h Reserved
2:1 RW-LB 00b
Length
This field documents the maximum bus number supported by the interleave
decoder.
MaxBusNumber is a 3-bit field that represents an exponential number 2^(n)-1. If
the 3-bits are zero, then n=8; else n=value. That is, 255, 1, 3, 7, 15, 31, 63,
127.
Processor only support the following configuration:
• 2’b10 : MaxBusNumber = 63 (that is, 64 MB MMCFG range)
• 2’b01 : MaxBusNumber = 127 (that is, 128 MB MMCFG range)
• 2’b00 : MaxBusNunber = 256 (that is, 256 MB MMCFG range)
Minimum granularity of MMCFG range is 64 MB.
0RW-LB0h
RULE_ENABLE
Enable for this MMCFG interleave decoder.
IOPORT_Target_LIST
Bus: N Device: 13 Function: 6 Offset: E0h
Bit Attr
Reset
Value
Description
31:24 RV 0h Reserved
23:21 RW-LB 0h
Package7
NodeID of the IOAPIC target.
20:18 RW-LB 0h
Package6
NodeID of the IOAPIC target.
17:15 RW-LB 0h
Package5
NodeID of the IOAPIC target.
14:12 RW-LB 0h
Package4
NodeID of the IOAPIC target.
11:9 RW-LB 0h
Package3
NodeID of the IOAPIC target.
8:6 RW-LB 0h
Package2
NodeID of the IOAPIC target.
5:3 RW-LB 0h
Package1
NodeID of the IOAPIC target.
2:0 RW-LB 0h
Package0
NodeID of the IOAPIC target.