Datasheet

Datasheet, Volume 2 299

Processor Uncore Configuration Registers
Table 4-17. Memory Controller Channel 2 Error Registers: Bus N, Device 16, Function 2,
Offset 100h–1FCh 
Memory Controller Channel 3 Error Registers: Bus N, Device 16, Function 3,
Offset 100h–1FCh
Memory Controller Channel 0 Error Registers: Bus N, Device 16, Function 6,
Offset 100h–1FCh
Memory Controller Channel 1 Error Registers: Bus N, Device 16, Function 7,
Offset 100h–1FCh
100h 180h
CORRERRCNT_0 104h
184h
CORRERRCNT_1 108h
188h
CORRERRCNT_2 10Ch
18Ch
CORRERRCNT_3 110h
190h
114h 194h
118h 198h
CORRERRTHRSHLD_0 11Ch
19Ch
CORRERRTHRSHLD_1 120h IOSAV_CH_B0_B3_BW_SERR 1A0h
CORRERRTHRSHLD_2 124h IOSAV_CH_B4_B7_BW_SERR 1A4h
CORRERRTHRSHLD_3 128h IOSAV_CH_B8_BW_SERR 1A8h
12Ch 1ACh
130h IOSAV_CH_B0_B3_BW_MASK 1B0h
CORRERRORSTATUS 134h IOSAV_CH_B4_B7_BW_MASK 1B4h
LEAKY_BKT_2ND_CNTR_REG 138h IOSAV_CH_B8_BW_MASK 1B8h
13Ch 1BCh
DEVTAG_C
NTL_3
DEVTAG_C
NTL_2
DEVTAG_C
NTL_1
DEVTAG_C
NTL_0
140h IOSAV_DQ_LFSR0 1C0h
DEVTAG_C
NTL_7
DEVTAG_C
NTL_6
DEVTAG_C
NTL_5
DEVTAG_C
NTL_4
144h IOSAV_DQ_LFSRSEED0 1C4h
148h IOSAV_DQ_LFSR1 1C8h
14Ch IOSAV_DQ_LFSRSEED1 1CCh
150h IOSAV_DQ_LFSR2 1D0h
154h IOSAV_DQ_LFSRSEED2 1D4h
158h 1D8h
15Ch 1DCh
160h MCSCRAMBLECONFIG 1E0h
164h MCSCRAMBLE_SEED_SEL 1E4h
168h 1E8h
16Ch 1ECh
170h 1F0h
174h 1F4h
178h 1F8h
17Ch 1FCh