Datasheet

Processor Uncore Configuration Registers
294 Datasheet, Volume 2
.
Table 4-12. Memory Controller Channel 2 Thermal Control Registers: Bus N, Device 16,
Function 0, Offset 100h–1FCh 
Memory Controller Channel 3 Thermal Control Registers: Bus N, Device 16,
Function 1, Offset 100h–1FCh
Memory Controller Channel 0 Thermal Control Registers: Bus N, Device 16,
Function 4, Offset 100h–1FCh
Memory Controller Channel 1 Thermal Control Registers: Bus N, Device 16,
Function 5, Offset 100h–1FCh
100h ET_DIMM_TH_0 180h
ET_CFG 104h ET_DIMM_TH_1 184h
CHN_TEMP_CFG 108h ET_DIMM_TH_2 188h
CHN_TEMP_STAT 10Ch
18Ch
DIMM_TEMP_OEM_0 110h THRT_PWR_DIMM_1 THRT_PWR_DIMM_0 190h
DIMM_TEMP_OEM_1 114h
THRT_PWR_DIMM_2 194h
DIMM_TEMP_OEM_2 118h
198h
11Ch 19Ch
DIMM_TEMP_TH_0 120h
1A0h
DIMM_TEMP_TH_1 124h
1A4h
DIMM_TEMP_TH_2 128h
1A8h
12Ch 1ACh
DIMM_TEMP_THRT_LMT_0 130h
1B0h
DIMM_TEMP_THRT_LMT_1 134h
1B4h
DIMM_TEMP_THRT_LMT_2 138h
1B8h
13Ch 1BCh
DIMM_TEMP_EV_OFST_0 140h
1C0h
DIMM_TEMP_EV_OFST_1 144h
1C4h
DIMM_TEMP_EV_OFST_2 148h
1C8h
14Ch 1CCh
DIMMTEMPSTAT_0 150h PM_PDWN 1D0h
DIMMTEMPSTAT_1 154h MC_TERM_RNK_MSK 1D4h
DIMMTEMPSTAT_2 158h PM_SREF 1D8h
15Ch PM_DLL 1DCh
PM_CMD_PWR_0 160h
1E0h
PM_CMD_PWR_1 164h
1E4h
PM_CMD_PWR_2 168h
1E8h
16Ch 1ECh
ET_DIMM_AVG_SUM_0 170h
1F0h
ET_DIMM_AVG_SUM_1 174h ET_CH_AVG 1F4h
ET_DIMM_AVG_SUM_2 178h ET_CH_SUM 1F8h
17Ch ET_CH_TH 1FCh