Datasheet

Processor Uncore Configuration Registers
282 Datasheet, Volume 2
4.1.13 CAPPTR—Capability Pointer Register
4.1.14 INTL—Interrupt Line Register
4.1.15 INTPIN—Interrupt Pin Register
4.1.16 MINGNT—Minimum Grant Register
4.1.17 MAXLAT—Maximum Latency Register
CAPPTR
Offset: 34h
Bit Attr
Reset
Value
Description
7:0 RO 00h
Capability Pointer
Points to the first capability structure for the device which is the PCIe capability.
INTL
Offset: 3Ch
Bit Attr
Reset
Value
Description
7:0 RO 00h
Interrupt Line
Not applicable for these devices
INTPIN
Offset: 3Dh
Bit Attr
Reset
Value
Description
7:0 RO 00h
Interrupt Pin
Not applicable since these devices do not generate any interrupt on their own
Offset: 3Eh
Bit Attr
Reset
Value
Description
7:0 RO 00h
Minimum Grant Value
This register does not apply to PCI Express. It is hard-coded to ‘00’h.
Offset: 3Fh
Bit Attr
Reset
Value
Description
7:0 RO 00h
Maximum Latency Value
This register does not apply to PCI Express. It is hard-coded to ‘00’h.