Datasheet

Processor Integrated I/O (IIO) Configuration Registers
264 Datasheet, Volume 2
3.3.8.46 VTD1_GLBCMD—Global Command Register
VTD1_GLBCMD
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: 1018h
Bit Attr
Reset
Value
Description
31 RW 0b
Translation Enable
Software writes to this field to request hardware to enable/disable DMA-
remapping hardware.
0 = Disable DMA-remapping hardware
1 = Enable DMA-remapping hardware
Hardware reports the status of the translation enable operation through the TES
field in the Global Status register. Before enabling (or re-enabling) DMA-
remapping hardware through this field, software must:
• Setup the DMA-remapping structures in memory
• Flush the write buffers (through WBF field), if write buffer flushing is reported
as required.
• Set the root-entry table pointer in hardware (through SRTP field).
• Perform global invalidation of the context-cache and global invalidation of
IOTLB
• If advanced fault logging supported, setup fault log pointer (through SFL field)
and enable advanced fault logging (through EAFL field).
There may be active DMA requests in the platform when software updates this
field. Hardware must enable or disable remapping logic only at deterministic
transaction boundaries, so that any in-flight transaction is either subject to
remapping or not at all.
30 RW 0b
Set Root Table Pointer
Software sets this field to set/update the root-entry table pointer used by
hardware. The root-entry table pointer is specified through the Root-entry Table
Address register.Hardware reports the status of the root table pointer set
operation through the RTPS field in the Global Status register. The root table
pointer set operation must be performed before enabling or re-enabling (after
disabling) DMA remapping hardware.
After a root table pointer set operation, software must globally invalidate the
context cache followed by global invalidate of IOTLB. This is required to ensure
hardware uses only the remapping structures referenced by the new root table
pointer, and not any stale cached entries. While DMA-remapping hardware is
active, software may update the root table pointer through this field. However, to
ensure valid in-flight DMA requests are deterministically remapped, software must
ensure that the structures referenced by the new root table pointer are
programmed to provide the same remapping results as the structures referenced
by the previous root table pointer.
Clearing this bit has no effect.
29 RO 0b
Set Fault Log Pointer
Not applicable to the processor
28 RO 0b
Enable Advanced Fault Logging
Not applicable to the processor
27 RO 0b
Write Buffer Flush
Not applicable to the processor
26 RW 0b
Queued Invalidation Enable
Software writes to this field to enable queued invalidations.
0 = Disable queued invalidations. In this case, invalidations must be performed
through the Context Command and IOTLB Invalidation Unit registers.
1 = Enable use of queued invalidations. Once enabled, all invalidations must be
submitted through the invalidation queue and the invalidation registers
cannot be used till the translation has been disabled. The invalidation queue
address register must be initialized before enabling queued invalidations.
Also software must make sure that all invalidations submitted prior using the
register interface are all completed before enabling the queued invalidation
interface.
Hardware reports the status of queued invalidation enable operation through QIES
field in the Global Status register. Value returned on read of this field is undefined.