Datasheet

Datasheet, Volume 2 261
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Processor Integrated I/O (IIO) Configuration Registers
3.3.8.42 VTD0_IOTLBINV—IOTLB Invalidate Register
VTD0_IOTLBINV
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: 208h
Bit Attr
Reset
Value
Description
63 RW 0b
Invalidate IOTLB cache
Software requests IOTLB invalidation by setting this field. Software must also set
the requested invalidation granularity by programming the IIRG field. Hardware
clears the IVT field to indicate the invalidation request is complete. Hardware also
indicates the granularity at which the invalidation operation was performed
through the IAIG field. Software must read back and check the IVT field to be
clear to confirm the invalidation is complete.
When IVT field is set, software must not update the contents of this register (and
Invalidate Address register, if it is being used), nor submit new IOTLB invalidation
requests.
62 RV 0h Reserved
61:60 RW 00b
IOTLB Invalidation Request Granularity
When requesting hardware to invalidate the I/OTLB (by setting the IVT field),
software writes the requested invalidation granularity through this IIRG field.
Following are the encoding for the 2-bit IIRG field.
00 = Reserved. Hardware ignores the invalidation request and reports
invalidation complete by clearing the IVT field and reporting 00 in the AIG
field.
01 = Global Invalidation request. The processor supports this.
10 = Domain-selective invalidation request. The target domain-id must be
specified in the DID field. The processor supports this
11 = Page-selective invalidation request. The target address, mask and
invalidation hint must be specified in the Invalidate Address register, the
domain-id must be provided in the DID field. The processor supports this.
59 RV 0h Reserved
58:57 RO 00b
IOTLB Actual Invalidation Granularity
Hardware reports the granularity at which an invalidation request was proceed
through the AIG field at the time of reporting invalidation completion (by clearing
the IVT field).The following are the encoding for the 2-bit IAIG field.
00 = Reserved. This indicates hardware detected an incorrect invalidation request
and ignored the request. Examples of incorrect invalidation requests include
detecting an unsupported address mask value in Invalidate Address register
for page-selective invalidation requests or an unsupported/undefined
encoding in IIRG.
01 = Global Invalidation performed. The processor sets this in response to a
global IOTLB invalidation request.
10 = Domain-selective invalidation performed using the domain-id that was
specified by software in the DID field. The processor sets this in response to
a domain selective IOTLB invalidation request.
11 = Processor sets this in response to a page selective invalidation request.
56:50 RV 0h Reserved
49 RW 0b
dr
Processor uses this to drain or not drain reads on an invalidation request.
48 RW 0b
dw
Processor uses this to drain or not drain writes on an invalidation request.
47:32 RW 0000h
did
Domain to be invalidated and is programmed by software for both page and
domain selective invalidation requests. Processor ignores the bits 47:40 since it
supports only an 8 bit Domain ID.
31:0 RV 0h Reserved