Datasheet

Datasheet, Volume 2 251
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Processor Integrated I/O (IIO) Configuration Registers
3.3.8.20 VTD0_INV_COMP_STATUS—Invalidation Completion 
Status Register
3.3.8.21 VTD0_INV_COMP_EVT_CTL—Invalidation Completion Event 
Control Register
VTD0_INV_COMP_STATUS
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: 9Ch
Bit Attr
Reset
Value
Description
31:1 RV 0h Reserved
0RW1CS 0b
Invalidation Wait Descriptor Complete
This field indicates completion of Invalidation Wait Descriptor with Interrupt Flag
(IF) field set. Hardware clears this field when it is executing a wait descriptor with
IF field set and sets this bit when the descriptor is complete.
VTD0_INV_COMP_EVT_CTL
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: A0h
Bit Attr
Reset
Value
Description
31 RW 1b
Interrupt Mask
0 = No masking of interrupt. When a invalidation event condition is detected,
hardware issues an interrupt message (using the Invalidation Event Data &
Invalidation Event Address register values).
1 = This is the value on reset. Software may mask interrupt message generation
by setting this field. Hardware is prohibited from sending the interrupt
message when this field is set.
30 RO 0b
Interrupt Pending
Hardware sets the IP field when it detects an interrupt condition. Interrupt
condition is defined as:
— An Invalidation Wait Descriptor with Interrupt Flag (IF) field set
completed, setting the IWC field in the Fault Status register.
• If the IWC field in the Invalidation Event Status register was already set at the
time of setting this field, it is not treated as a new interrupt condition. The IP
field is kept set by hardware while the interrupt message is held pending. The
interrupt message could be held pending due to interrupt mask (IM field)
being set, or due to other transient hardware conditions.
The IP field is cleared by hardware as soon as the interrupt message pending
condition is serviced. This could be due to either:
• Hardware issuing the interrupt message due to either change in the transient
hardware condition that caused interrupt message to be held pending or due
to software clearing the IM field.
• Software servicing the IWC field in the Fault Status register.
29:0 RV 0h Reserved