Datasheet

Datasheet, Volume 2 25

Introduction
1 Introduction
This document is Volume 2 of the datasheet for the Intel
®
Core™ i7 processor family
for the LGA-2011 socket. The complete datasheet consists of two volumes. This
document provides register information. Volume 1 provides DC electrical specifications,
land and signal definitions, interface functional descriptions, power management
descriptions, and additional feature information pertinent to the implemtation and
operation of the processor on its platform.
The Intel
®
Core™ i7 processor family for the LGA-2011 socket are multi-core
processors, based on 32-nm process technology. The processor is optimized for
performance with the power efficiencies of a low-power microarchitecture. Processor
features vary by SKU and include up to 20 MB of shared cache, and an integrated
memory controller. The processors support all the existing Streaming SIMD Extensions
2 (SSE2), Streaming SIMD Extensions 3 (SSE3), and Streaming SIMD Extensions 4
(SSE4). The processor supports several Advanced Technologies – Execute Disable Bit,
Intel
®
64 Technology, Enhanced Intel SpeedStep
®
Technology, Intel
®
Virtualization
Technology (Intel
®
VT), and Intel
®
Hyper-Threading Technology (Intel
®
HT
Technology).
The processor contains one or more PCI devices within a single physical component.
The configuration registers for these devices are mapped as devices residing on the PCI
Bus assigned for the processor socket. This document describes these configuration
space registers or device-specific control and status registers (CSRs) only. This
document does NOT include Model Specific Registers (MSRs).
The processor implements several key technologies:
• Four channel Integrated Memory Controller supporting DDR3
• Integrated I/O with up to 40 lanes for PCI Express* capable of up to 8.0 GT/s
speeds.
Note: Throughout this document, Intel
®
Core™ i7 processor family for the LGA-2011 socket
may be referred to as “processor”.
1.1 Document Terminology
A ‘#’ symbol after a signal name refers to an active low signal, indicating a signal is in
the active state when driven to a low level. For example, when RESET# is low, a reset
has been requested.
Table 1-1. Processor Terminology (Sheet 1 of 3)
Term Description
DDR3
Third generation Double Data Rate SDRAM memory technology that is the
successor to DDR2 SDRAM
DMA Direct Memory Access
DMI2 Direct Media Interface 2
DTS Digital Thermal Sensor
Enhanced Intel
SpeedStep® Technology
Allows the operating system to reduce power consumption when performance is
not needed.