Datasheet

Processor Integrated I/O (IIO) Configuration Registers
246 Datasheet, Volume 2
3.3.8.8 VTD0_FLTSTS—Fault Status Register
VTD0_FLTSTS
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: 34h
Bit Attr
Reset
Value
Description
31:16 RV 0h Reserved
15:8 ROS-V 0h
Fault Record Index
This field is valid only when the Primary Fault Pending field is set. This field
indicates the index (from base) of the fault recording register to which the first
pending fault was recorded when the Primary Fault pending field was set by
hardware.
7RV0hReserved
6RW1CS0b
Invalidation Timeout Error
Hardware detected a Device-IOTLB invalidation completion time-out. At this time,
a fault event may be generated based on the programming of the Fault Event
Control register.
5RW1CS0b
Invalidation Completion Error
Hardware received an unexpected or invalid Device-IOTLB invalidation completion.
At this time, a fault event is generated based on the programming of the Fault
Event Control register.
4RW1CS0b
Invalidation Queue Error
Hardware detected an error associated with the invalidation queue. For example,
hardware detected an erroneous or un-supported Invalidation Descriptor in the
Invalidation Queue. At this time, a fault event is generated based on the
programming of the Fault Event Control register.
3:2 RV 0h Reserved
1ROS-V0b
Primary Fault Pending
This field indicates if there are one or more pending faults logged in the fault
recording registers. Hardware computes this field as the logical OR of Fault (F)
fields across all the fault recording registers of this DMA-remap hardware unit.
0 = No pending faults in any of the fault recording registers
1 = One or more fault recording registers has pending faults. The fault recording
index field is updated by hardware whenever this field is set by hardware.
Also, depending on the programming of fault event control register, a fault
event is generated when hardware sets this field.
0RW1CS0b
Primary Fault Overflow
Hardware sets this bit to indicate overflow of fault recording registers