Datasheet

Datasheet, Volume 2 243
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Processor Integrated I/O (IIO) Configuration Registers
3.3.8.5 VTD0_GLBSTS—Global Status Register
23 RW 0b
Compatibility Format Interrupt
Software writes to this field to enable or disable Compatibility Format interrupts
on Intel 64 platforms. The value in this field is effective only when interrupt-
remapping is enabled and Legacy Interrupt Mode is active.
0 = Block Compatibility format interrupts.
1 = Process Compatibility format interrupts as pass-through (bypass interrupt
remapping).
Hardware reports the status of updating this field through the CFIS field in the
Global Status register.
This field is not implemented on Itanium
®
platforms.
22:0 RV 0h Reserved
VTD0_GLBSTS
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: 1Ch
Bit Attr
Reset
Value
Description
31 RO 0b
Translation Enable Status
When set, this bit indicates that translation hardware is enabled and when clear
indicates the translation hardware is not enabled.
30 RO 0b
Set Root Table Pointer Status
This field indicates the status of the root- table pointer in hardware.This field is
cleared by hardware when software sets the SRTP field in the Global Command
register. This field is set by hardware when hardware finishes the set root-table
pointer operation (by performing an implicit global invalidation of the context-
cache and IOTLB, and setting/updating the root-table pointer in hardware with the
value provided in the Root-Entry Table Address register).
29 RO 0b
Set Fault Log Pointer Status
Not applicable to the processor
28 RO 0b
Advanced Fault Logging Status
Not applicable to the processor
27 RO 0b
Write Buffer Flush Status
Not applicable to the processor
26 RO 0b
Queued Invalidation Interface Status
IIO sets this bit once it has completed the software command to enable the
queued invalidation interface. Until then, this bit is 0.
25 RO 0b
Interrupt Remapping Enable Status
OH sets this bit once it has completed the software command to enable the
interrupt remapping interface. Until then, this bit is 0.
24 RO 0b
Interrupt Remapping Table Pointer Status
This field indicates the status of the interrupt remapping table pointer in
hardware. This field is cleared by hardware when software sets the SIRTP field in
the Global Command register. This field is set by hardware when hardware
completes the set interrupt remap table pointer operation using the value
provided in the Interrupt Remapping Table Address register.
23 RO 0b
Compatibility Format Interrupt Status
The value reported in this field is applicable only when interrupt-remapping is
enabled and Legacy interrupt mode is active.
0 = Compatibility format interrupts are blocked.
1 = Compatibility format interrupts are processed as pass-through (bypassing
interrupt remapping).
VTD0_GLBCMD
Bus: 0 Device: 5 Function: 0 MMIO BAR: VTBAR
Offset: 18h
Bit Attr
Reset
Value
Description