Datasheet

Processor Integrated I/O (IIO) Configuration Registers
234 Datasheet, Volume 2
Table 3-21. Intel
®
VT-d Memory Mapped Registers – 00h–FFh (VTD0)
VTD0_VERSION 0h
VTD0_INV_QUEUE_HEAD
80h
4h 84h
VTD0_CAP
8h
VTD0_INV_QUEUE_TAIL
88h
Ch 8Ch
VTD0_EXT_CAP
10h
VTD0_INV_QUEUE_ADD
90h
14h 94h
VTD0_GLBCMD 18h
98h
VTD0_GLBSTS 1Ch VTD0_INV_COMP_STATUS 9Ch
VTD0_ROOTENTRYADD
20h VTD0_INV_COMP_EVT_CTL A0h
24h VTD0_INV_COMP_EVT_DATA A4h
VTD0_CTXCMD
28h
VTD0_INV_COMP_EVT_ADDR
A8h
2Ch ACh
30h B0h
VTD0_FLTSTS 34h
B4h
VTD0_FLTEVTCTRL 38h
VTD0_INTR_REMAP_TABLE_BASE
B8h
VTD0_FLTEVTDATA 3Ch BCh
VTD0_FLTEVTADDR
40h
C0h
44h
C4h
48h C8h
4Ch CCh
50h D0h
54h D4h
58h D8h
5Ch DCh
60h E0h
VTD0_PMEN 64h
E4h
VTD0_PROT_LOW_MEM_BASE 68h
E8h
VTD0_PROT_LOW_MEM_LIMIT 6Ch
ECh
VTD0_PROT_HIGH_MEM_BASE
70h
F0h
74h
F4h
VTD0_PROT_HIGH_MEM_LIMIT
78h
F8h
7Ch
FCh