Datasheet

Processor Integrated I/O (IIO) Configuration Registers
222 Datasheet, Volume 2
3.3.6.11 IOAPICTETPC—IOxAPIC Table Entry Target Programmable 
Control Register
3.3.6.12 IOADSELS0—IOxAPIC DSELS Register 0
IOAPICTETPC
Bus: 0 Device: 5 Function: 4 Offset: A0
Bit Attr
Reset
Value
Description
31:17 RV 0h Reserved
16 RW 0b
CB DMA Channel 0 IntA Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 7
1 = src/int is connected to IOAPIC table entry 23
15:13 RV 0h Reserved
12 RW 0b
NTB Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 16
1 = src/int is connected to IOAPIC table entry 23
11 RV 0h Reserved
10 RW 0b
Port 3c IntB Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 21
1 = src/int is connected to IOAPIC table entry 19
9RV0hReserved
8RW0b
Port 3a IntB Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 20
1 = src/int is connected to IOAPIC table entry 17
7RV0hReserved
6RW0b
Port 2c IntB Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 13
1 = src/int is connected to IOAPIC table entry 11
5RV0hReserved
4RW0b
Port 2a IntB Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 12
1 = src/int is connected to IOAPIC table entry 9
3:1 RV 0h Reserved
0RW0b
Port 0 IntB Interrupt Assignment
0 = src/int is connected to IOAPIC table entry 1
1 = src/int is connected to IOAPIC table entry 3
IOADSELS0
Bus: 0 Device: 5 Function: 4 Offset: 288
Bit Attr
Reset
Value
Description
31:29 RV 0h Reserved
28 RWS 0b SW2IPC AER Negative Edge Mask
27 RWS 0b SW2IPC AER Event Select
26:0 RWS 0h gttcfg2SIpcIOADels0[26:0]