Datasheet

Datasheet, Volume 2 209
Processor Integrated I/O (IIO) Configuration Registers
3.3.5.13 IRPP1FFERRST—IRP Protocol Fatal FERR Status Register
The error status log indicates which error is causing the report of the first fatal error
event.
3.3.5.14 IRPP1FNERRST—IRP Protocol Fatal NERR Status Register
The error status log indicates which error is causing the report of the next fatal error
event (any event that is not the first).
IRPP1FFERRST
Bus: 0 Device: 5 Function: 2 Offset: 2B8
Bit Attr
Reset
Value
Description
31:15 RV 0h Reserved
14 ROS-V 0b
Protocol Parity Error (DB)
This bit was Originally used for detecting parity error on coherent interface;
however, no parity checks exist. Thus, this bit logs parity errors on data from the
IIO switch on the inbound path.
13 ROS-V 0b Protocol Queue/Table Overflow or Underflow (DA)
12:11 RV 0h Reserved
10 ROS-V 0b
Protocol Layer Received Unexpected Response/Completion (D7)
A completion has been received from the Coherent Interface that was unexpected.
9:5 RV 0h Reserved
4ROS-V 0bCSR Access Crossing 32-bit Boundary (C3)
3ROS-V 0b
Write Cache Un-correctable ECC (C2)
A double bit ECC error was detected within the Write Cache.
2ROS-V 0b
Protocol Layer Received Poisoned Packet (C1)
A poisoned packet has been received from the Coherent Interface.
1ROS-V 0b
Write Cache Correctable ECC (B4)
A single bit ECC error was detected and corrected within the Write Cache.
0RV0hReserved
IRPP1FNERRST
Bus: 0 Device: 5 Function: 2 Offset: 2BC
Bit Attr
Reset
Value
Description
31:15 RV 0h Reserved
14 ROS-V 0b
Protocol Parity Error (DB)
This bit was originally used for detecting parity error on coherent interface;
however, no parity checks exist. Thus, this bit logs parity errors on data from the
IIO switch on the inbound path.
13 ROS-V 0b Protocol Queue/Table Overflow or Underflow (DA)
12:11 RV 0h Reserved
10 ROS-V 0b
Protocol Layer Received Unexpected Response/Completion (D7)
A completion has been received from the Coherent Interface that was unexpected.
9:5 RV 0h Reserved
4ROS-V 0bCSR Access Crossing 32-bit Boundary (C3)
3ROS-V 0b
Write Cache Un-correctable ECC (C2)
A double bit ECC error was detected within the Write Cache.
2ROS-V 0b
Protocol Layer Received Poisoned Packet (C1)
A poisoned packet has been received from the Coherent Interface.