Datasheet
Datasheet, Volume 2 205
Processor Integrated I/O (IIO) Configuration Registers
3.3.5.6 IRPP0NFERRST—IRP Protocol Non-Fatal FERR Status Register
The error status log indicates which error is causing the report of the first non-fatal
error event.
3.3.5.7 IRPP0NNERRST—IRP Protocol Non-Fatal NERR Status Register
The error status log indicates which error is causing the report of the next non-fatal
error event (any event that is not the first).
IRPP0NFERRST
Bus: 0 Device: 5 Function: 2 Offset: 250
Bit Attr
Reset
Value
Description
31:15 RV 0h Reserved
14 ROS-V 0b
Protocol Parity Error (DB)
This bit was originally used for detecting parity error on coherent interface;
however, no parity checks exist. Thus, this bit logs parity errors on data from the
IIO switch on the inbound path.
13 ROS-V 0b Protocol Queue/Table Overflow or Underflow (DA)
12:11 RV 0h Reserved
10 ROS-V 0b
Protocol Layer Received Unexpected Response/Completion (D7)
A completion has been received from the Coherent Interface that was unexpected.
9:5 RV 0h Reserved
4ROS-V 0bCSR access crossing 32-bit boundary (C3)
3ROS-V 0b
Write Cache Un-correctable ECC (C2)
A double bit ECC error was detected within the Write Cache.
2ROS-V 0b
Protocol Layer Received Poisoned Packet (C1)
A poisoned packet has been received from the Coherent Interface.
1ROS-V 0b
Write Cache Correctable ECC (B4)
A single bit ECC error was detected and corrected within the Write Cache.
0RV0hReserved
IRPP0NNERRST
Bus: 0 Device: 5 Function: 2 Offset: 254
Bit Attr
Reset
Value
Description
31:15 RV 0h Reserved
14 ROS-V 0b
Protocol Parity Error (DB)
This bit was originally used for detecting parity error on coherent interface;
however, no parity checks exist. Thus, this bit logs parity errors on data from the
IIO switch on the inbound path.
13 ROS-V 0b Protocol Queue/Table Overflow or Underflow (DA)
12:11 RV 0h Reserved
10 ROS-V 0b
Protocol Layer Received Unexpected Response/Completion (D7)
A completion has been received from the Coherent Interface that was unexpected.
9:5 RV 0h Reserved
4ROS-V 0bCSR Access Crossing 32-bit Boundary (C3)
3ROS-V 0b
Write Cache Un-correctable ECC (C2)
A double bit ECC error was detected within the Write Cache.
2ROS-V 0b
Protocol Layer Received Poisoned Packet (C1)
A poisoned packet has been received from the Coherent Interface.