Datasheet

Datasheet, Volume 2 203
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Processor Integrated I/O (IIO) Configuration Registers
3.3.5.3 IRPP0FFERRST—IRP Protocol Fatal FERR Status Register
The error status log indicates which error is causing the report of the first fatal error
event.
4RWS0b
CSR Access Crossing 32-bit Boundary (C3)
0 = Disable error status logging for this error
1 = Enable Error status logging for this error
3RWS0b
Write Cache Un-correctable ECC (C2)
0 = Disable error status logging for this error
1 = Enable Error status logging for this error
2RWS0b
Protocol Layer Received Poisoned Packet (C1)
0 = Disable error status logging for this error
1 = Enable Error status logging for this error
1RWS0b
Write Cache Correctable ECC (B4)
0 = Disable error status logging for this error
1 = Enable Error status logging for this error
0RV0hReserved
IRPP0ERRCTL
Bus: 0 Device: 5 Function: 2 Offset: 234
Bit Attr
Reset
Value
Description
IRPP0FFERRST
Bus: 0 Device: 5 Function: 2 Offset: 238
Bit Attr
Reset
Value
Description
31:15 RV 0h Reserved
14 ROS-V 0b
Protocol Parity Error (DB)
This bit was originally used for detecting parity error on coherent interface;
however, no parity checks exist. Thus, this bit logs parity errors on data from the
IIO switch on the inbound path.
13 ROS-V 0b Protocol Queue/Table Overflow or Underflow (DA)
12:11 RV 0h Reserved
10 ROS-V 0b
Protocol Layer Received Unexpected Response/Completion (D7)
A completion has been received from the Coherent Interface that was unexpected.
9:5 RV 0h Reserved
4ROS-V 0bCSR Access Crossing 32-bit Boundary (C3)
3ROS-V 0b
Write Cache Un-correctable ECC (C2)
A double bit ECC error was detected within the Write Cache.
2ROS-V 0b
Protocol Layer Received Poisoned Packet (C1)
A poisoned packet has been received from the Coherent Interface.
1ROS-V 0b
Write Cache Correctable ECC (B4)
A single bit ECC error was detected and corrected within the Write Cache.
0RV0hReserved