Datasheet

Datasheet, Volume 2 193
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Processor Integrated I/O (IIO) Configuration Registers
3.3.4.4 PCIERRSV—PCIe* Error Severity Map Register
This register allows remapping of the PCIe errors to the IIO error severity.
3.3.4.5 SYSMAP—System Error Event Map Register
This register maps the error severity detected by the IIO to on of the system events.
When an error is detected by the IIO, its corresponding error severity determines which
system event to generate according to this register.
PCIERRSV
Bus: 0 Device: 5 Function: 2 Offset: 94
Bit Attr
Reset
Value
Description
31:6 RV 0h Reserved
5:4 RWS 10b
PCIe Fatal Error Severity Map
10 = Map this PCIe error type to Error Severity 2
01 = Map this PCIe error type to Error Severity 1
00 = Map this PCIe error type to Error Severity 0
3:2 RWS 01b
PCIe Non-Fatal Error Severity Map
10 = Map this PCIe error type to Error Severity 2
01 = Map this PCIe error type to Error Severity 1
00 = Map this PCIe error type to Error Severity 0
1:0 RWS 00b
PCIe Correctable Error Severity Map
10 = Map this PCIe error type to Error Severity 2
01 = Map this PCIe error type to Error Severity 1
00 = Map this PCIe error type to Error Severity 0
SYSMAP
Bus: 0 Device: 5 Function: 2 Offset: 9C
Bit Attr
Reset
Value
Description
31:11 RV 0h Reserved
10:8 RWS 101b
Severity 2 Error Map
101 = Generate CPEI
010 = Generate NMI
001 = Generate SMI/PMI
000 = No inband message
Others = Reserved
7RV0hReserved
6:4 RWS 010b
Severity 1 Error Map
101 = Generate CPEI
010 = Generate NMI
001 = Generate SMI/PMI
000 = No inband message
Others = Reserved
3RV0hReserved
2:0 RWS 010b
Severity 0 Error Map
101 = Generate CPEI
010 = Generate NMI
001 = Generate SMI/PMI
000 = No inband message
Others = Reserved