Datasheet

Datasheet, Volume 2 185
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Processor Integrated I/O (IIO) Configuration Registers
3.3.3.39 IRP0DBGRING[0:1]—Coherent Interface 0 Debug Ring 0 Register
3.3.3.40 IRP1DBGRING[0:1]—Coherent Interface 1 Debug Ring 0 Register
3.3.3.41 IRP0DBGRING1—Coherent Interface 0 Debug Ring 1 Register
3.3.3.42 IRP1DBGRING1—Coherent Interface 1 Debug Ring 1 Register
IRP0DBGRING[0:1]
Bus: 0 Device: 5 Function: 0 Offset: 818
Bit Attr
Reset
Value
Description
63:0 RO
000000
000000
0000h
Debug Ring Signal
IRP1DBGRING[0:1]
Bus: 0 Device: 5 Function: 0 Offset: 820
Bit Attr
Reset
Value
Description
63:0 RO
000000
000000
0000h
Debug Ring Signal
IRP0DBGRING1
Bus: 0 Device: 5 Function: 0 Offset: 828
Bit Attr
Reset
Value
Description
7:0 RO 00h Debug Ring Signal [71:64]
IRP1DBGRING1
Bus: 0 Device: 5 Function: 0 Offset: 829
Bit Attr
Reset
Value
Description
7:0 RO 00h Debug Ring Signal [71:64]