Datasheet

Datasheet, Volume 2 181

Processor Integrated I/O (IIO) Configuration Registers
14 RW 0b
Pipeline Non-Snooped Writes on the Coherent Interface
When this bit is set, it allows inbound non-snooped writes to pipeline at the
coherent interface; issuing the writes before previous writes are completed in the
coherent domain.
13 RW 0b
VC1 Reads Bypass VC1 Writes
0 = VC1 Reads push VC1 writes
1 = VC1 Reads are allowed to bypass VC1 writes
12 RW 0b
Lock Thawing Mode
This mode controls how inbound queues in the south agents (PCIe, DMI) thaw
when they are target of a locked read. See xref for details on when this should be
used and on the restrictions in its use.
0 = Thaw only posted requests
1 = Thaw posted and non-posted requests.
If the lock target is also a ’problematic’ port (as indicated by bit TBD in
MISCCTRLSTS register), then this becomes meaningless because both posted and
non-posted requests are thawed.
11 RV 0h Reserved
10 RW 0b
Legacy Port
Sockets where the NodeID=0 are generally identified as having the legacy DMI
port. But there is still a possibility that another socket also has a NodeID=0. The
system is configured by software to route legacy transactions to the correct
socket. However, inbound legacy messages received on a PCIe port of a socket
with NodeID=0 that is not the true legacy port need to be routed to a remote
socket that is the true legacy port.
For a local NodeID is zero, this bit is used to determine if inbound messages
should be routed to a DMI port on a remote socket with NodeID=0, or if the
messages should be sent to the local DMI port, since the local NodeID is also 0. If
the local NodeID is not zero, then this bit is ignored.
0 = indicates this socket has the true DMI legacy port, send legacy transactions
to local DMI port
1 = indicates this is a non-legacy socket, send legacy transactions to the
Coherent Interface
Notes:
1. This bit does not affect routing for non-message transactions. It only affects
inbound messages that need to be routed to the true legacy port.
2. This bit is NOT used for any outbound address decode/routing purposes.
Outbound traffic that is subtractively decoded will always be forwarded to
local DMI port, if one exists, or it will be aborted.
3. The default value of this field is based on the NodeID and
FWAGENT_DMIMODE straps.
4. Software can only change this bit after reset during early boot phase, but
must guarantee there is no traffic flowing through the system, except for the
write that changes this bit.
9RW1b
Intel High Definition Audio traffic to use VCp channel
This bit indicates whether Isoch Intel High Definition Audio traffic from PCH will
use the VCp channel or the VC1 channel. It is used to optimized isoch traffic flow.
0 = Isoch Intel High Definition Audio traffic optimized for VC1 - only VC1 traffic
will use the low latency paths
1 = Isoch Intel High Definition Audio traffic optimized for VCp - VC1 and VCp will
use the low latency paths
8RW0bTOCM field is valid
Enables the TOCM field.
IIOMISCCTRL
Bus: 0 Device: 5 Function: 0 Offset: 1C0
Bit Attr
Reset
Value
Description