Datasheet

Datasheet, Volume 2 179
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Processor Integrated I/O (IIO) Configuration Registers
36:35 RV 0h Reserved
34:32 RWS 000b
Show the PCI Express Port identifier in Intel QPI packets
A Port Identifier that identifies which PCI Express port a transaction comes from
will be placed in the AD Ring TNID[2:0] field of the request packet, when enabled.
This field is normally used for DCAHint and is not used for normal demand read.
Since there are up to 11 specific ports, then Port ID is encoded in 4 bits. Only
three bits can be selected to be sent in TNID as follows:
100 = TNID[2:0] = PortID[3:1]
011 = TNID[2:0] = PortID[3:2, 0]
010 = TNID[2:0] = PortID[3, 1:0]
001 = TNID[2:0] = PortID[2:0]
000 = IIO will not send Port ID information in the TNID[2:0] field
The PortIDs are mapped as follows:
0 = Device 0 Function 0 DMI/PCIe port 0 (IOU2)
1 = Device 1 Function 0 Port 1a (x4 or x8) (IOU2)
2 = Device 1 Function 1 Port 1b (x4) (IOU2)
3 = Device 2 Function 0 Port 2a (x4, x8, or x16) (IOU0)
4 = Device 2 Function 1 Port 2b (x4) (IOU0)
5 = Device 2 Function 2 Port 2c (x4 or x8) (IOU0)
6 = Device 2 Function 3 Port 2d (x4) (IOU0)
7 = Device 3 Function 0 Port 3a (x4, x8, or x16)
8 = Device 3 Function 1 Port 3b (x4) (IOU1)
9 = Device 3 Function 2 Port 3c (x4 or x8) (IOU1)
10 = Device 3 Function 3 Port 3d (x4) (IOU1)
11 = CB
12 = VT
Note: The TNID[2:0] value will be copied to the TORID[4:0] by CBo, if the packet
is to be sent to the Intel QPI port.
31 RV 0h Reserved
30 RW 1b
Treat last write in descriptor Specially
Treat CB DMA writes with NS=RO=1 & NS is enabled in CB DMA & ’last write in
descriptor’, as-if NS=1 and RO=0 write.
29 RW 0b
Disable local P2P memory writes
When set, local peer-to-peer memory writes are aborted by IIO .
28 RW 0b
Disable local P2P Reads
When set, local peer-to-peer memory reads are aborted by IIO and a UR response
returned
27 RW 0b
Disable Remote P2P memory writes
When set, remote peer-to-peer memory writes are aborted by IIO.
26 RW 0b
Disable Remote P2P Reads
When set, remote peer-to-peer memory reads are aborted by IIO and a UR
response returned.
25 RWS 1b
Use Allocating Flows for CB DMA
When set, use Allocating Flows for non-DCA writes from CB DMA. This bit does not
affect DCA requests when DCA requests are enabled (bit 21 of this register). A
DCA request is identified as matching the DCA requestor ID and having a Tag of
non-zero. All DCA requests are always allocating, unless they are disabled, or
unless all allocating flows are disabled (bit 24). If all allocating flows are disabled,
then DCA requests are also disabled.
BIOS is to leave this bit at default of 1b for all but DMI port.
IIOMISCCTRL
Bus: 0 Device: 5 Function: 0 Offset: 1C0
Bit Attr
Reset
Value
Description